Patents by Inventor Hua Chiang

Hua Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240194646
    Abstract: A semiconductor package includes a substrate, first bumps, a first chip, metal pillars, second bumps and a second chip. The substrate includes first and second conductive pads which are located on a top surface of the substrate. Both ends of the first bumps are connected to the first conductive pads and the first chip, respectively. Both ends of the metal pillars are connected to the second conductive pads and one end of the second bumps, respectively. A cross-sectional area of each of the metal pillars is larger than that of each of the second bumps. The second chip is connected to the other end of the second bumps and located above the first chip.
    Type: Application
    Filed: September 29, 2023
    Publication date: June 13, 2024
    Inventors: Chin-Tang Hsieh, Lung-Hua Ho, Chih-Ming Kuo, Chen-Yu Wang, Chih-Hao Chiang, Pai-Sheng Cheng, Kung-An Lin, Chun-Ting Kuo, Yu-Hui Hu, Wen-Cheng Hsu
  • Publication number: 20240180434
    Abstract: The present invention provides a system and method for blood pressure measurement, a computer program product using the method, and a computer-readable recording medium thereof. The present invention uses a sensor to measure an electrophysiological signal and establishes a personalized cardiovascular model through a numerical method, and re-establishes the personalized cardiovascular model through an optimization algorithm. Thus, a human physiological parameter generated from the re-established personal cardiovascular model matches the electrophysiological signal. Therefore, the present invention can provide accurate measurement results with the advantage of a small size, and can be applied to telemedicine field.
    Type: Application
    Filed: January 22, 2024
    Publication date: June 6, 2024
    Inventors: Sheng-Chieh HUANG, Paul C.-P. CHAO, Yung Hua KAO, Pei-Yu CHIANG
  • Publication number: 20240170537
    Abstract: Semiconductor structures are provided. The semiconductor structure includes a substrate and nanostructures formed over the substrate. In addition, the nanostructures includes channel regions and source/drain regions. The semiconductor structure further includes a gate structure vertically sandwiched the channel regions of the nanostructures and a contact wrapping around and vertically sandwiched between the source/drain regions of the nanostructures.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ta-Chun LIN, Kuo-Hua PAN, Jhon-Jhy LIAW, Chao-Ching CHENG, Hung-Li CHIANG, Shih-Syuan HUANG, Tzu-Chiang CHEN, I-Sheng CHEN, Sai-Hooi YEONG
  • Patent number: 11987891
    Abstract: The present disclosure provides a gas sensor. The gas sensor includes a substrate, a conductor layer over the substrate, wherein the conductor layer includes a conductive pattern including a plurality of openings, the openings being arranged in a repeating pattern, an insulating layer in the plurality of openings and over a top surface of the conductive pattern, wherein the conductive pattern is embedded in the insulating layer, and a gas sensing film over a portion of the insulating layer.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Ta Lei, Chia-Hua Chu, Hsin-Chih Chiang, Tung-Tsun Chen, Chun-Wen Cheng
  • Patent number: 11990525
    Abstract: A first source/drain structure is disposed over a substrate. A second source/drain structure is disposed over the substrate. An isolation structure is disposed between the first source/drain structure and the second source/drain structure. The first source/drain structure and a first sidewall of the isolation structure form a first interface that is substantially linear. The second source/drain structure and a second sidewall of the isolation structure form a second interface that is substantially linear. A first source/drain contact surrounds the first source/drain structure in multiple directions. A second source/drain contact surrounds the second source/drain structure in multiple directions. The isolation structure is disposed between the first source/drain contact and the second source/drain contact.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ta-Chun Lin, Kuan-Lin Yeh, Chun-Jun Lin, Kuo-Hua Pan, Mu-Chi Chiang, Jhon Jhy Liaw
  • Patent number: 11980694
    Abstract: A sterilization apparatus for a portable electronic device including a cabinet and a carrier is provided. The carrier includes a base slidably disposed on the cabinet, multiple first positioning elements and multiple second positioning elements disposed in parallel on the base, multiple sterilization light sources corresponding to the second positioning elements and multiple pressure sensors disposed in parallel in the base. The base is configured to carry at least one portable electronic device. One second positioning element is disposed between any two adjacent first positioning elements, and any first positioning element and any second positioning element adjacent to each other are separated by a positioning space. The pressure sensors are respectively located in the positioning spaces. One sterilization light source is disposed between any two adjacent pressure sensors, and the pressure sensors are configured to sense a pressure from the portable electronic device.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: May 14, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Yi-Hung Chen, Chih-Wen Chiang, Yun-Tung Pai, Yen-Hua Hsiao, Yao-Kuang Su, Yi-Hsuan Lin, Han-Sheng Siao
  • Patent number: 11959304
    Abstract: A lock assembly includes a lock, a pre-loadable mount and an adjusting element. The lock includes a shell formed with two bores and a hole. The pre-loadable mat t includes a yoke, two bent rods extending from the yoke, and two pivots respectively extending from the bent rods, wherein the pivots are respectively inserted in the bores. The adjusting element includes a first section inserted in the hole and a second section placed against the yoke so that the bent rods are located against a rear face of the door while a portion of the shell is placed against a front face of the door.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: April 16, 2024
    Assignee: ASMITH MANUFACTURING COMPANY
    Inventor: Ching-Hua Chiang
  • Publication number: 20240110407
    Abstract: A lock assembly includes a lock, a pre-loadable mount and an adjusting element. The lock includes a shell formed with two bores and a hole. The pre-loadable mount includes a yoke, two bent rods extending from the yoke, and two pivots respectively extending from the bent rods, wherein the pivots are respectively inserted in the bores. The adjusting element includes a first section inserted in the hole and a second section placed against the yoke so that the bent rods are located against a rear face of the door while a portion of the shell is placed against a front face of the door.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventor: Ching-Hua Chiang
  • Patent number: 11942433
    Abstract: In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Jen-Fu Liu, Ming Hung Tseng, Tsung-Hsien Chiang, Yen-Liang Lin, Tzu-Sung Huang
  • Publication number: 20240079758
    Abstract: An electronic device includes a metal back cover, a metal frame, and a first, second, third, and fourth radiators. The metal frame includes a discrete part and two connection parts. The connection parts are located by two sides of the discrete part, separated from the discrete part, and connected to the metal back cover. A U-shaped slot is formed between the discrete part and the metal back cover and between the discrete part and the connection parts. The first radiator is separated from the discrete part and includes a feed end. The second, third, and fourth radiators are connected to the discrete part and the metal back cover. The third radiator is located between the first and second radiators. The first radiator is located between the third and fourth radiators. The discrete part and the first, second, third, and fourth radiators form an antenna module together.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 7, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Chih-Wei Liao, Hau Yuen Tan, Shih-Keng Huang, Wen-Hgin Chuang, Lin-Hsu Chiang, Chang-Hua Wu, Han-Wei Wang, Chun-Jung Hu
  • Publication number: 20240076422
    Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Inventors: Jing-Cherng TSAI, Jen-Long WU, Wen-Hao KANG, Kuei-Pin LIN, Jing-Yu LEE, Jun-Ye HONG, Zih-Yu SHIH, Cheng-Hung CHIANG, Gang-Wei SHEN, Yu-Chuan SUNG, Chung-Hua WENG, Hsing-Ya CHEN
  • Patent number: 11923194
    Abstract: A semiconductor device includes a semiconductor substrate having a first lattice constant, a dopant blocking layer disposed over the semiconductor substrate, the dopant blocking layer having a second lattice constant different from the first lattice constant, and a buffer layer disposed over the dopant blocking layer, the buffer layer having a third lattice constant different from the second lattice constant. The semiconductor device also includes a plurality of channel members suspended over the buffer layer, an epitaxial feature abutting the channel members, and a gate structure wrapping each of the channel members.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Hsin-Che Chiang, Wei-Chih Kao, Chun-Sheng Liang, Kuo-Hua Pan
  • Patent number: 11923413
    Abstract: Semiconductor structures are provided. The semiconductor structure includes a substrate and nanostructures formed over the substrate. The semiconductor structure further includes a gate structure surrounding the nanostructures and a source/drain structure attached to the nanostructures. The semiconductor structure further includes a contact formed over the source/drain structure and extending into the source/drain structure.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ta-Chun Lin, Kuo-Hua Pan, Jhon-Jhy Liaw, Chao-Ching Cheng, Hung-Li Chiang, Shih-Syuan Huang, Tzu-Chiang Chen, I-Sheng Chen, Sai-Hooi Yeong
  • Patent number: 11923455
    Abstract: A semiconductor device and method of forming the same are disclosed. The semiconductor device includes a fin structure, a gate electrode, a source-drain region, a plug and a hard mask structure. The gate electrode crosses over the fin structure. The source-drain region in the fin structure is aside the gate electrode. The plug is disposed over and electrically connected to the gate electrode. The hard mask structure surrounds the plug and is disposed over the gate electrode, wherein the hard mask structure includes a first hard mask layer and a second hard mask layer, the second hard mask layer covers a sidewall and a top surface of the first hard mask layer, and a material of the first hard mask layer is different from a material of the second hard mask layer.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Sheng Liang, Kuo-Hua Pan, Hsin-Che Chiang, Ming-Heng Tsai
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 11904968
    Abstract: A bicycle accessory mounting bracket includes a first member, a second member and a plug member. The first member has a first connecting pillar with a first sliding slot. The second member has a second connecting pillar. The plug member is inserted into the first and second connecting pillars inserted into each other through the first sliding slot and the through hole of the second connecting pillar. The plug member includes a shell, an actuating member and two abutting members. The actuating member has a wide portion and a concave portion. In the first position, the wide portion is located between the penetration holes, and the abutting members are pushed by the wide portion to enter the perforation holes. When in the second position, the concave portion is located between the penetration holes, the abutting members enter the concave portion, and the first and second connecting pillars can rotate relatively.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: February 20, 2024
    Assignee: TIEN HSIN INDUSTRIES CO., LTD.
    Inventor: Meng-Hua Chiang
  • Publication number: 20240034427
    Abstract: An automatic control system includes a host connected to the actuator and the inputting device of a bicycle. The actuator controls the motor to drive the mechanical structure to generate a displacement. The inputting device receives the external information by manually entering or automatically sensing via the inputting device to obtain an inputting parameter. In each riding journey of the predetermined path, the host records the inputting parameter that the controller of the actuator drives the motor based on and the time spent for the riding journey to form a riding information. When the rider rides the bicycle on the predetermined path again, the host selects one of the riding information, which has the shortest time spent for the riding journey, as an operating parameter for controlling the actuator, so that the host automatically controls the actuator based on the operating parameter to prevent the cyclist from distracting.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Applicant: TIEN HSIN INDUSTRIES CO., LTD.
    Inventor: Meng-Hua Chiang
  • Publication number: 20240027995
    Abstract: A process for manufacturing a customized bicycle handle grip includes obtaining a hand shape database including a hand shape information of users. The hand shape information of each user includes a dimensional parameter including a measured value. The measured values in the hand shape database are divided into dimensional intervals, wherein a handle grip forming parameter is designed for each dimensional interval. After that, a hand shape information of a client is obtained to be compared with the hand shape information in the hand shape database to be classified into one of the dimensional intervals. The handle grip forming parameter of the one of the dimensional intervals is obtained for generating a 3D-computer-graphics of the customized bicycle handle grip based on the handle grip forming parameter. Then, define the hand shape information of the client as a restricting region and optimize the 3D-computer-graphics to obtain an optimized 3D-computer-graphics for 3D printing.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Applicant: TIEN HSIN INDUSTRIES CO., LTD.
    Inventor: MENG-HUA CHIANG
  • Patent number: 11852558
    Abstract: A power measuring system includes a processor, a control unit, a memory unit, and a power sensor including a sensing unit and a signal processing unit correspondingly outputting an electrical signal according to a deformation of the sensing unit. The sensing unit is disposed to either a right operational part or a left operational part of a bicycle. The control unit is controlled by a user and outputs a weighting command. The processor receives the weighting command and stores the weighting command into the memory unit, and obtains a weighting parameter corresponding to the weighting command according to a reference table stored in the memory unit, and receives the electrical signal outputted from the signal processing unit, and calculates a first power value, and multiplies the first power value by the weighting parameter to get a second power value, and adds the first power value and the second power value to obtain a total power value.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: December 26, 2023
    Assignee: TIEN HSIN INDUSTRIES, CO., LTD.
    Inventor: Meng-Hua Chiang