Patents by Inventor Hua-Yu Liu
Hua-Yu Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8245160Abstract: A system and a method for creating a focus-exposure model of a lithography process are disclosed. The system and the method utilize calibration data along multiple dimensions of parameter variations, in particular within an exposure-defocus process window space. The system and the method provide a unified set of model parameter values that result in better accuracy and robustness of simulations at nominal process conditions, as well as the ability to predict lithographic performance at any point continuously throughout a complete process window area without a need for recalibration at different settings. With a smaller number of measurements required than the prior-art multiple-model calibration, the focus-exposure model provides more predictive and more robust model parameter values that can be used at any location in the process window.Type: GrantFiled: September 23, 2011Date of Patent: August 14, 2012Assignee: ASML Netherlands B.V.Inventors: Jun Ye, Yu Cao, Luoqi Chen, Hua-Yu Liu
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Publication number: 20120017183Abstract: A system and a method for creating a focus-exposure model of a lithography process are disclosed. The system and the method utilize calibration data along multiple dimensions of parameter variations, in particular within an exposure-defocus process window space. The system and the method provide a unified set of model parameter values that result in better accuracy and robustness of simulations at nominal process conditions, as well as the ability to predict lithographic performance at any point continuously throughout a complete process window area without a need for recalibration at different settings. With a smaller number of measurements required than the prior-art multiple-model calibration, the focus-exposure model provides more predictive and more robust model parameter values that can be used at any location in the process window.Type: ApplicationFiled: September 23, 2011Publication date: January 19, 2012Applicant: ASML Netherlands B.V.Inventors: Jun Ye, Yu Cao, Luoqi Chen, Hua-Yu Liu
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Patent number: 8065636Abstract: A system and a method for creating a focus-exposure model of a lithography process are disclosed. The system and the method utilize calibration data along multiple dimensions of parameter variations, in particular within an exposure-defocus process window space. The system and the method provide a unified set of model parameter values that result in better accuracy and robustness of simulations at nominal process conditions, as well as the ability to predict lithographic performance at any point continuously throughout a complete process window area without a need for recalibration at different settings. With a smaller number of measurements required than the prior-art multiple-model calibration, the focus-exposure model provides more predictive and more robust model parameter values that can be used at any location in the process window.Type: GrantFiled: May 18, 2010Date of Patent: November 22, 2011Assignee: ASML Netherlands B.V.Inventors: Jun Ye, Yu Cao, Luoqi Chen, Hua-Yu Liu
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Publication number: 20110107280Abstract: The present invention relates generally to selecting optimum patterns based on diffraction signature analysis, and more particularly to, using the optimum patterns for mask-optimization for lithographic imaging. A respective diffraction map is generated for each of a plurality of target patterns from an initial larger set of target patterns from the design layout. Diffraction signatures are identified from the various diffraction maps. The plurality of target patterns is grouped into various diffraction-signature groups, the target patterns in a specific diffraction-signature group having similar diffraction signature. A subset of target patterns is selected to cover all possible diffraction-signature groups, such that the subset of target patterns represents at least a part of the design layout for the lithographic process. The grouping of the plurality of target patterns may be governed by predefined rules based on similarity of diffraction signature.Type: ApplicationFiled: October 28, 2010Publication date: May 5, 2011Applicant: ASML Netherlands B.V.Inventors: Hua-Yu Liu, Luoqi Chen, Hong Chen, Zhi-Pan Li
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Publication number: 20110099526Abstract: The present invention relates to lithographic apparatuses and processes, and more particularly to tools for optimizing illumination sources and masks for use in lithographic apparatuses and processes. According to certain aspects, the present invention enables full chip pattern coverage while lowering the computation cost by intelligently selecting a small set of critical design patterns from the full set of clips to be used in source and mask optimization. Optimization is performed only on these selected patterns to obtain an optimized source. The optimized source is then used to optimize the mask (e.g. using OPC and manufacturability verification) for the full chip, and the process window performance results are compared. If the results are comparable to conventional full-chip SMO, the process ends, otherwise various methods are provided for iteratively converging on the successful result.Type: ApplicationFiled: October 28, 2010Publication date: April 28, 2011Applicant: ASML Netherlands B.V.Inventor: Hua-Yu Liu
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Publication number: 20100229147Abstract: A system and a method for creating a focus-exposure model of a lithography process are disclosed. The system and the method utilize calibration data along multiple dimensions of parameter variations, in particular within an exposure-defocus process window space. The system and the method provide a unified set of model parameter values that result in better accuracy and robustness of simulations at nominal process conditions, as well as the ability to predict lithographic performance at any point continuously throughout a complete process window area without a need for recalibration at different settings. With a smaller number of measurements required than the prior-art multiple-model calibration, the focus-exposure model provides more predictive and more robust model parameter values that can be used at any location in the process window.Type: ApplicationFiled: May 18, 2010Publication date: September 9, 2010Applicant: ASML Netherlands B.V.Inventors: Jun YE, Yu Cao, Luoqi Chen, Hua-Yu Liu
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Patent number: 7747978Abstract: A system and a method for creating a focus-exposure model of a lithography process are disclosed. The system and the method utilize calibration data along multiple dimensions of parameter variations, in particular within an exposure-defocus process window space. The system and the method provide a unified set of model parameter values that result in better accuracy and robustness of simulations at nominal process conditions, as well as the ability to predict lithographic performance at any point continuously throughout a complete process window area without a need for recalibration at different settings. With a smaller number of measurements required than the prior-art multiple-model calibration, the focus-exposure model provides more predictive and more robust model parameter values that can be used at any location in the process window.Type: GrantFiled: August 2, 2006Date of Patent: June 29, 2010Assignee: ASML Netherlands B.V.Inventors: Jun Ye, Yu Cao, Luoqi Chen, Hua-Yu Liu
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Patent number: 7251377Abstract: Resolution enhancement techniques (RETs) aid in accurately transferring features on a layout to a wafer. Unfortunately, RETs may work well at one pitch but not another pitch. If image quality falls below an acceptable threshold at a certain pitch, then such a pitch is called a forbidden pitch. A cell library cell that can automatically avoid forbidden pitches is provided. In this method, evaluation points on edges of a feature in a cell can be analyzed based on a RET and a lithography model. Using this analysis, any forbidden pitch for the feature can be identified. Additionally, any forbidden pitch can be changed to an acceptable pitch, i.e. a pitch resulting in an acceptable image quality. The forbidden pitch information and the associated acceptable pitch information for the feature can be stored in a database to facilitate analyzing other features/cells.Type: GrantFiled: April 29, 2003Date of Patent: July 31, 2007Assignee: Synopsys, Inc.Inventor: Hua-Yu Liu
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Patent number: 7178128Abstract: Methods and apparatuses for preparing layouts and masks that use phase shifting to enable production of subwavelength features on an integrated circuit in close (optical) proximity to other structures are described. One embodiment selects from several strategies for resolving conflicts between phase shifters used to define features and (optically) proximate structures that are being defined other than by phase shifting. One embodiment adds additional phase shifters to define the conflicting structures. Another embodiment corrects the shape of the phase shifters in proximity to a conflicting structure. Resulting integrated circuits can include a greater number of subwavelength features even in areas that are in close proximity to structures that were not initially identified for production using a phase shifting mask.Type: GrantFiled: October 15, 2002Date of Patent: February 13, 2007Assignee: Synopsys Inc.Inventors: Hua-Yu Liu, Christophe Pierrat, Kent Richardson
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Publication number: 20070031745Abstract: A system and a method for creating a focus-exposure model of a lithography process are disclosed. The system and the method utilize calibration data along multiple dimensions of parameter variations, in particular within an exposure-defocus process window space. The system and the method provide a unified set of model parameter values that result in better accuracy and robustness of simulations at nominal process conditions, as well as the ability to predict lithographic performance at any point continuously throughout a complete process window area without a need for recalibration at different settings. With a smaller number of measurements required than the prior-art multiple-model calibration, the focus-exposure model provides more predictive and more robust model parameter values that can be used at any location in the process window.Type: ApplicationFiled: August 2, 2006Publication date: February 8, 2007Applicant: BRION TECHNOLOGIES, INC.Inventors: Jun Ye, Yu Cao, Luoqi Chen, Hua-Yu Liu
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Patent number: 7082596Abstract: One embodiment of the invention provides a system that uses simulation results to select evaluation points for a model-based optical proximity correction (OPC) operation. Upon receiving a layout, the system first selects critical segments in the layout, and then performs a dense simulation on the critical segments. This dense simulation identifies deviations (or low contrast) between a desired layout and a simulated layout at multiple evaluation points on each of the critical segments. Next, for each critical segment, the system selects an evaluation point from the multiple evaluation points on the critical segment based on results of the dense simulation. The system then performs a model-based OPC operation using the selected evaluation point for each critical segment.Type: GrantFiled: November 27, 2002Date of Patent: July 25, 2006Assignee: Synopsys, Inc.Inventor: Hua-Yu Liu
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Patent number: 6944844Abstract: A critical dimension, or width, of a feature, or a semiconductor device, can be measured to provide direct and meaningful information regarding the impact of line end shortening, or length, on the function of the device. Specifically, a location on the feature where the width will have an impact on device performance can be selected. Using a simulation, the width at that location can be computed. Given the difficulties of direct measurement of line end shortening and the relationship between the width measurement and the impact on device performance, better layout checking is facilitated than by standard measurements of line end shortening.Type: GrantFiled: April 3, 2002Date of Patent: September 13, 2005Assignee: Synopsys, Inc.Inventor: Hua-Yu Liu
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Patent number: 6859918Abstract: One embodiment of the invention provides a system and a method for reducing line end shortening during an optical lithography process for manufacturing an integrated circuit. The system operates by receiving a specification of the integrated circuit, wherein the specification defines transistors that include gates. Next, the system identifies a gate within the specification, wherein the gate includes an endcap that is susceptible to line end shortening during the optical lithography process. The system then extends a phase shifter used to form the gate, so that the phase shifter defines at least a portion of the endcap and thereby reduces line end shortening of the endcap due to optical effects.Type: GrantFiled: December 6, 2002Date of Patent: February 22, 2005Assignee: Numerical TechnologiesInventors: Melody W. Ma, Hua-Yu Liu
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Patent number: 6830854Abstract: An accurate, cost-effective system and method for correcting 3D effects on an alternating phase-shifting mask (PSM) is provided. To facilitate this correction, a library can be built to include a first group of 180 degree phase-shifting regions, wherein these regions have a common first size. Based on this first size, 3D simulation is performed. A transmission and a phase are altered in a 2D simulation based on this first size until a shape dependent transmission and a shape dependent phase allow the 2D simulation to substantially match the 3D simulation. Finally, a modified first size is chosen using the shape dependent transmission and the shape dependent phase such that a 2D simulation based on the modified first size substantially matches the 3D simulation based on the first size. The library associates the first size with the modified first size, the shape dependent transmission, and the shape dependent phase.Type: GrantFiled: October 14, 2003Date of Patent: December 14, 2004Assignee: Numerical Technologies, Inc.Inventors: Yong Liu, Hua-Yu Liu
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Publication number: 20040218831Abstract: Resolution enhancement techniques (RETs) aid in accurately transferring features on a layout to a wafer. Unfortunately, RETs may work well at one pitch but not another pitch. If image quality falls below an acceptable threshold at a certain pitch, then such a pitch is called a forbidden pitch. A cell library cell that can automatically avoid forbidden pitches is provided. In this method, evaluation points on edges of a feature in a cell can be analyzed based on a RET and a lithography model. Using this analysis, any forbidden pitch for the feature can be identified. Additionally, any forbidden pitch can be changed to an acceptable pitch, i.e. a pitch resulting in an acceptable image quality. The forbidden pitch information and the associated acceptable pitch information for the feature can be stored in a database to facilitate analyzing other features/cells.Type: ApplicationFiled: April 29, 2003Publication date: November 4, 2004Applicant: Numerical Technologies, Inc.Inventor: Hua-Yu Liu
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Patent number: 6813759Abstract: One embodiment of the invention provides a system that facilitates optical proximity correction for alternating aperture phase shifting designs. During operation, the system receives a layout, which includes a complementary mask and a phase shifting mask. A subset of trim features on the complementary mask that are designed to protect the dark areas left unexposed by the phase shifting mask are adjusted first using a rules-based optical proximity correction process. This is then supplemented by a model-based correction to the phase shifters, Additionally, the portions of the trim that are co-extensive with the original layout can be corrected, e.g. at the time of the correction of the complementary mask using either rule or model based corrections.Type: GrantFiled: September 9, 2002Date of Patent: November 2, 2004Assignee: Numerical Technologies, Inc.Inventors: Hua-yu Liu, Weinong Lai, Xiaoyang Li
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Publication number: 20040102945Abstract: One embodiment of the invention provides a system that uses simulation results to select evaluation points for a model-based optical proximity correction (OPC) operation. Upon receiving a layout, the system first selects critical segments in the layout, and then performs a dense simulation on the critical segments. This dense simulation identifies deviations (or low contrast) between a desired layout and a simulated layout at multiple evaluation points on each of the critical segments. Next, for each critical segment, the system selects an evaluation point from the multiple evaluation points on the critical segment based on results of the dense simulation. The system then performs a model-based OPC operation using the selected evaluation point for each critical segment.Type: ApplicationFiled: November 27, 2002Publication date: May 27, 2004Applicant: Numerical Technologies Inc.Inventor: Hua-Yu Liu
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Publication number: 20040076895Abstract: An accurate, cost-effective system and method for correcting 3D effects on an alternating phase-shifting mask (PSM) is provided. To facilitate this correction, a library can be built to include a first group of 180 degree phase-shifting regions, wherein these regions have a common first size. Based on this first size, 3D simulation is performed. A transmission and a phase are altered in a 2D simulation based on this first size until a shape dependent transmission and a shape dependent phase allow the 2D simulation to substantially match the 3D simulation. Finally, a modified first size is chosen using the shape dependent transmission and the shape dependent phase such that a 2D simulation based on the modified first size substantially matches the 3D simulation based on the first size. The library associates the first size with the modified first size, the shape dependent transmission, and the shape dependent phase.Type: ApplicationFiled: October 14, 2003Publication date: April 22, 2004Applicant: Numerical Technologies, Inc.Inventors: Yong Liu, Hua-Yu Liu
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Publication number: 20040049761Abstract: One embodiment of the invention provides a system that facilitates optical proximity correction for alternating aperture phase shifting designs. During operation, the system receives a layout, which includes a complementary mask and a phase shifting mask. A subset of trim features on the complementary mask that are designed to protect the dark areas left unexposed by the phase shifting mask are adjusted first using a rules-based optical proximity correction process. This is then supplemented by a model-based correction to the phase shifters, Additionally, the portions of the trim that are co-extensive with the original layout can be corrected, e.g. at the time of the correction of the complementary mask using either rule or model based corrections.Type: ApplicationFiled: September 9, 2002Publication date: March 11, 2004Applicant: Numerical Technologies, Inc.Inventors: Hua-yu Liu, Weinong Lai, Xiaoyang Li
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Patent number: 6704921Abstract: An automated phase assignment method is described that allows multiple rules for defining phase shifters to be used within a single cell. The rules for defining phase shifters can be sequenced. Then for a cell, the rules can be recursively applied. At each stage if the number of phase conflicts is below a threshold, then portions of the cell having conflicts are masked and processed using the next less aggressive rule set. This in turn leads to phase shifting masks with greater variation in phase shifter shapes and sizes. When the mask is used to fabricate integrated circuits (ICs), the resulting IC may have a greater number of small transistors and other features than a mask defined using only a single rule set per cell. Additional benefits can include better process latitude during IC fabrication and improved yield.Type: GrantFiled: April 3, 2002Date of Patent: March 9, 2004Assignee: Numerical Technologies, Inc.Inventor: Hua-Yu Liu