Patents by Inventor HUANG-CHAN CHIEN

HUANG-CHAN CHIEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9485671
    Abstract: An inter-stage test structure for a wireless communication apparatus is provided. The wireless communication apparatus has a unit under test (UUT) and a next-stage component connected to the UUT through a signal wire. The inter-stage test structure is disposed on the signal wire and electrically connects the UUT to the next-stage unit component. The inter-stage test structure includes an upper board, a lower board, and an intermediate layer. The intermediate layer is disposed between the upper board and the lower board. The intermediate layer includes a first region and a second region defined thereon. The first region has an air cavity for generating an air impedance. The second region has an impedance adjusting cavity for generating an adjustable impedance. Accordingly, the inter-stage test structure can detect the condition of the UUT of the wireless communication apparatus based on the air impedance and the adjustable impedance.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: November 1, 2016
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventor: Huang-Chan Chien
  • Patent number: 9373556
    Abstract: A module IC package structure for increasing heat-dissipating efficiency includes a substrate unit, an electronic unit, a package unit, a first heat-dissipating unit and a second heat-dissipating unit. The substrate unit includes a circuit substrate. The electronic unit includes a plurality of electronic components disposed on the circuit substrate and electrically connected to the circuit substrate. The package unit includes a package gel body disposed on the circuit substrate for enclosing the electronic components. The first heat-dissipating unit includes a heat-dissipating base layer disposed on the top surface of the package gel body. The second heat-dissipating unit includes a plurality of heat-dissipating auxiliary layers disposed on the top surface of the heat-dissipating base layer. Whereby, the heat-dissipating efficiency of the module IC package structure can be increased by matching the heat-dissipating base layer and the heat-dissipating auxiliary layers.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: June 21, 2016
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventor: Huang-Chan Chien
  • Publication number: 20150241496
    Abstract: An inter-stage test structure for a wireless communication apparatus is provided. The wireless communication apparatus has a unit under test (UUT) and a next-stage component connected to the UUT through a signal wire. The inter-stage test structure is disposed on the signal wire and electrically connects the UUT to the next-stage unit component. The inter-stage test structure includes an upper board, a lower board, and an intermediate layer. The intermediate layer is disposed between the upper board and the lower board. The intermediate layer includes a first region and a second region defined thereon. The first region has an air cavity for generating an air impedance. The second region has an impedance adjusting cavity for generating an adjustable impedance. Accordingly, the inter-stage test structure can detect the condition of the UUT of the wireless communication apparatus based on the air impedance and the adjustable impedance.
    Type: Application
    Filed: February 27, 2014
    Publication date: August 27, 2015
    Applicant: AZUREWAVE TECHNOLOGIES, INC.
    Inventor: HUANG-CHAN CHIEN
  • Patent number: 9076801
    Abstract: A module IC package structure includes a substrate unit, an electronic unit, a package unit and a shielding unit. The substrate unit includes a circuit substrate and a grounding layer disposed inside the circuit substrate. The grounding layer is exposed from the outer surrounding peripheral surface of the circuit substrate. The electronic unit includes a plurality of electronic components disposed on the circuit substrate. The electronic components are electrically connected to the grounding layer through the circuit substrate. The package unit includes a package gel body disposed on the circuit substrate to enclose the electronic components. The shielding unit includes a metal shielding layer disposed on the outer surface of the package gel body and the surrounding peripheral surface of the circuit substrate. The metal shielding layer directly contacts the grounding layer, thus the electronic components are electrically connected to the metal shielding layer through the grounding layer.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: July 7, 2015
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventor: Huang-Chan Chien
  • Publication number: 20150130033
    Abstract: A module IC package structure includes a substrate unit, an electronic unit, a package unit and a shielding unit. The substrate unit including a circuit substrate, a grounding layer disposed inside the circuit substrate, and an outer conductive structure disposed on the outer surrounding peripheral surface of the circuit substrate. The outer conductive structure includes a plurality of outer conductive layers. The grounding layer is exposed from the circuit substrate for directly contacting the outer conductive layers. The electronic unit includes a plurality of electronic components disposed on the circuit substrate. The package unit includes a package gel body disposed on the circuit substrate to enclose the electronic components. The shielding unit includes a metal shielding layer enclosing the package gel body and directly contacting the outer conductive structure. Whereby, the grounding layer is electrically connected to the metal shielding layer through the outer conductive structure directly.
    Type: Application
    Filed: November 10, 2013
    Publication date: May 14, 2015
    Applicant: AZUREWAVE TECHNOLOGIES, INC.
    Inventor: HUANG-CHAN CHIEN
  • Publication number: 20150131230
    Abstract: A module IC package structure for increasing heat-dissipating efficiency includes a substrate unit, an electronic unit, a package unit, a first heat-dissipating unit and a second heat-dissipating unit. The substrate unit includes a circuit substrate. The electronic unit includes a plurality of electronic components disposed on the circuit substrate and electrically connected to the circuit substrate. The package unit includes a package gel body disposed on the circuit substrate for enclosing the electronic components. The first heat-dissipating unit includes a heat-dissipating base layer disposed on the top surface of the package gel body. The second heat-dissipating unit includes a plurality of heat-dissipating auxiliary layers disposed on the top surface of the heat-dissipating base layer. Whereby, the heat-dissipating efficiency of the module IC package structure can be increased by matching the heat-dissipating base layer and the heat-dissipating auxiliary layers.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 14, 2015
    Applicant: AZUREWAVE TECHNOLOGIES, INC.
    Inventor: HUANG-CHAN CHIEN
  • Publication number: 20150130034
    Abstract: A module IC package structure includes a substrate unit, an electronic unit, a package unit and a shielding unit. The substrate unit includes a circuit substrate and a grounding layer disposed inside the circuit substrate. The grounding layer is exposed from the outer surrounding peripheral surface of the circuit substrate. The electronic unit includes a plurality of electronic components disposed on the circuit substrate. The electronic components are electrically connected to the grounding layer through the circuit substrate. The package unit includes a package gel body disposed on the circuit substrate to enclose the electronic components. The shielding unit includes a metal shielding layer disposed on the outer surface of the package gel body and the surrounding peripheral surface of the circuit substrate. The metal shielding layer directly contacts the grounding layer, thus the electronic components are electrically connected to the metal shielding layer through the grounding layer.
    Type: Application
    Filed: November 13, 2013
    Publication date: May 14, 2015
    Applicant: AZUREWAVE TECHNOLOGIES, INC.
    Inventor: HUANG-CHAN CHIEN
  • Patent number: 8874061
    Abstract: A filtering apparatus and method for dual-band sensing circuit are disclosed. The invention features a dual-band sensing unit disposed in a filtering device that receives the signals from a sub-system with variable frequency spectrum. The signals are split up into several bands. After that, one or more frequency detecting units are used to detect the power of high-band and low-band signals, and convert the power into a voltage signal. Users can externally adjust the gain of a tunable gain amplifier for the voltage signal. Further, a comparison operation is processed by a comparator, and a signal resulted from the comparison operation is used to control the switch timing for an RF switching unit. Consequently, this like adaptive notch filter is achieved to determine the intensity of noise and thereby to turn on the high-band or low-band notch filters, so as to reduce the in-band loss.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: October 28, 2014
    Assignee: Azurewave Technologies, Inc.
    Inventors: Chung-Er Huang, Huang-Chan Chien
  • Publication number: 20110304379
    Abstract: A signal matching module for a single or multiple subsystems is disclosed. The signal matching module includes a plurality of electronic components with a first part of the electronic components categorized into external electronic components and a second part of the electronic components categorized into internal components. Each of the electronic components may correspond to a switch that is controllable by a corresponding control pin. And the external electronic components may be used to compensate the internal electronic components when the latter fail to cause the impedance to reach the desired level. One of the embodiments is to provide a unit cell which is used to connect with one or multiple subsystems, and an external communication port to which the external electronic components are connected serving as a feeding point for the purpose of better impedance matching.
    Type: Application
    Filed: August 25, 2011
    Publication date: December 15, 2011
    Applicant: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: CHUNG ER HUANG, HUANG CHAN CHIEN
  • Publication number: 20090111405
    Abstract: A signal matching module for single or multiple systems is disclosed, thereby enhancing the flexibility in using a communication module, and the performance of each subsystem. Further, a fine-tuning function is introduced into a selective matching circuit for the case that the inner matching components in the communication module cannot reach a required matching. Still further, a multi-stage matching circuit is used to reach a required Q-value (quality factor) for the matching circuit, thereby tuning the bandwidth. One of the preferred embodiments is to provide a unit cell which is used to connect with one or multiple subsystems, and a feeding point disposed outside the matching circuit to generate a better impedance matching and bandwidth.
    Type: Application
    Filed: October 30, 2007
    Publication date: April 30, 2009
    Inventors: Chung-Er Huang, Huang-Chan Chien
  • Publication number: 20090096517
    Abstract: A filtering apparatus and method for dual-band sensing circuit are disclosed. The invention features a dual-band sensing unit disposed in a filtering device that receives the signals from a sub-system with variable frequency spectrum. The signals are split up into several bands. After that, one or more frequency detecting units are used to detect the power of high-band and low-band signals, and convert the power into a voltage signal. Users can externally adjust the gain of a tunable gain amplifier for the voltage signal. Further, a comparison operation is processed by a comparator, and a signal resulted from the comparison operation is used to control the switch timing for an RF switching unit. Consequently, this like adaptive notch filter is achieved to determine the intensity of noise and thereby to turn on the high-band or low-band notch filters, so as to reduce the in-band loss.
    Type: Application
    Filed: January 22, 2008
    Publication date: April 16, 2009
    Inventors: Chung-Er Huang, Huang-Chan Chien
  • Publication number: 20090091005
    Abstract: A shielding structure for semiconductor includes a semiconductor substrate, at least one active region defined on the semiconductor substrate, a protecting layer, a shielding layer, and a covering layer. The protecting layer, produced by a semiconductor process, is disposed on the surface of the active region. The shielding layer produced by a semiconductor process is disposed on the surface of the protecting layer. The covering layer covers the shielding layers, and the protecting layer is harder than the covering layer. In the above-mentioned structure, the harder protecting layer is provided to prevent the active regions from heat damage.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 9, 2009
    Inventors: Chung-Er Huang, Huang-Chan Chien
  • Publication number: 20090051461
    Abstract: A output power detecting system with a directional coupler has a directional coupler at the output terminal of the output power detecting system. The directional coupler includes a main line, a first sub line, and a second sub line. The output of the power amplifying unit is fully coupled to a power detecting unit via the coupling between the main line and the first sub line, and the external noise is coupled to the ground via the coupling between the first sub line and the second sub line. Therefore, the power detecting unit accurately detects the output power of the output power detecting system.
    Type: Application
    Filed: August 21, 2007
    Publication date: February 26, 2009
    Applicant: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: CHUNG-ER HUANG, HUANG-CHAN CHIEN