Patents by Inventor Huang-Ta Huang

Huang-Ta Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9711468
    Abstract: A bonding pad structure comprises a first dielectric layer, a first conductive island in a second dielectric layer over the first dielectric layer and a via array having a plurality of vias in a third dielectric layer over the first conductive island. The structure also comprises a plurality of second conductive islands in a fourth dielectric layer over the via array. The second conductive islands are each separated from one another by a dielectric material of the fourth dielectric layer and in contact with at least one via of the via array. The structure further comprises a substrate over the second conductive islands. The substrate has an opening defined therein that exposes at least one second conductive island. The structure additionally comprises a bonding pad over the substrate. The bonding pad is in contact with the at least one second conductive island through the opening in the substrate.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: July 18, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Han Tsai, Jung-Chi Jeng, Yueh-Ching Chang, Volume Chien, Huang-Ta Huang, Chi-Cherng Jeng
  • Publication number: 20150214165
    Abstract: A bonding pad structure comprises a first dielectric layer, a first conductive island in a second dielectric layer over the first dielectric layer and a via array having a plurality of vias in a third dielectric layer over the first conductive island. The structure also comprises a plurality of second conductive islands in a fourth dielectric layer over the via array. The second conductive islands are each separated from one another by a dielectric material of the fourth dielectric layer and in contact with at least one via of the via array. The structure further comprises a substrate over the second conductive islands. The substrate has an opening defined therein that exposes at least one second conductive island. The structure additionally comprises a bonding pad over the substrate. The bonding pad is in contact with the at least one second conductive island through the opening in the substrate.
    Type: Application
    Filed: April 10, 2015
    Publication date: July 30, 2015
    Inventors: Tsung-Han TSAI, Jung-Chi JENG, Yueh-Ching CHANG, Volume CHIEN, Huang-Ta HUANG, Chi-Cherng JENG
  • Patent number: 9041204
    Abstract: A bonding pad structure includes a substrate and a first conductive island formed in a first dielectric layer and disposed over the substrate. A first via array having a plurality of vias is formed in a second dielectric layer and disposed over the first conductive island. A second conductive island is formed in a third dielectric layer and disposed over the first via array. A bonding pad is disposed over the second conductive island. The first conductive island, the first via array, and the second conductive island are electrically connected to the bonding pad. The first via array is connected to no other conductive island in the first dielectric layer except the first conductive island. No other conductive island in the third dielectric layer is connected to the first via array except the second conductive island.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: May 26, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Han Tsai, Jung-Chi Jeng, Yueh-Ching Chang, Volume Chien, Huang-Ta Huang, Chi-Cherng Jeng
  • Publication number: 20140225215
    Abstract: A bonding pad structure for an image sensor device and a method of fabrication thereof. The image sensor device has a radiation-sensor region including a substrate and a radiation detection device, and a bonding pad region including the bonding pad structure. The bonding pad structure includes: an interconnect layer; an interlayer dielectric layer (IDL), both layers extending from under the substrate into the bonding pad region; an isolation layer formed on IDL; a conductive pad having a planar portion and one or more bridging portions extending perpendicularly from the planar portion, through the IDL and isolation layers, and to the interconnect layer; and a plurality of non-conducting stress-releasing structures disposed between the isolation layer and the conductive pad in such a way to adjoin its planar and the bridging portions together for releasing potential pulling stress applied thereon and preventing a conductive pad peeling.
    Type: Application
    Filed: February 8, 2013
    Publication date: August 14, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: VOLUME CHIEN, Chen I-Chih, Ying-Lang Wang, Chen Hsin-Chi, Chen Ying-Hao, Huang-Ta Huang
  • Publication number: 20130256893
    Abstract: A bonding pad structure includes a substrate and a first conductive island formed in a first dielectric layer and disposed over the substrate. A first via array having a plurality of vias is formed in a second dielectric layer and disposed over the first conductive island. A second conductive island is formed in a third dielectric layer and disposed over the first via array. A bonding pad is disposed over the second conductive island. The first conductive island, the first via array, and the second conductive island are electrically connected to the bonding pad. The first via array is connected to no other conductive island in the first dielectric layer except the first conductive island. No other conductive island in the third dielectric layer is connected to the first via array except the second conductive island.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 3, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Han TSAI, Jung-Chi JENG, Yueh-Ching CHANG, Volume CHIEN, Huang-Ta HUANG, Chi-Cherng JENG
  • Patent number: 6822395
    Abstract: A device for controlling emission of electrons from an arc chamber of a plasma flood system into an ion beam in an ion implanter for implanting ions into a substrate. In one embodiment, the invention comprises a mechanical shutter disposed in a discharge opening between the arc chamber and the plasma guide tube of the implanter. The bore size of the shutter can be selectively varied in order to control the emission of electrons from the arc chamber into the ion beam in the plasma guide tube. In another embodiment, the invention comprises an electron-attracting probe which is disposed in the discharge opening.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: November 23, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Ming-Hsing Li, Min-Tsung Lee, Keneth Lin, Yow-Te Tsai, Huang-Ta Huang, Chao-Chun Chen, Huei-Mei Jao