Abstract: The adhesion between two layers, in particular two thin layers of a microelectronic device, is a data item of importance. It was found that the closure ratio of the interface could be used, in non-destructive manner, to determine a measurement of bond energy. A method and a device using a magnitude characteristic of this length are described, in particular using low incidence X-ray reflection and electronic density at the interface.

Abstract: The invention relates to a method for making a stack of at least two stages of circuits, each stage comprising a substrate and at least one component (10, 20) and metallic connections formed in or on this substrate, the assembly of a stage to be transferred onto a previous stage comprising: a) ionic implantation (29) in the substrate (2, 25) of the stage to be transferred through at least part of the components (10, 20), so as to form a weakened zone (30), b) formation of metallic connections of said components, c) transfer and assembly of some of this substrate onto the previous stage, d) a step to thin the transferred part of said substrate by fracture along the weakened zone (30).

Abstract: A method for preparing an oxidized surface of a first wafer for bonding with a second wafer. The method includes treating the oxidized surface with a solution of NH4OH/H2O2 at treatment parameters sufficient to etch about 10 ? to about 120 ? from the wafer surface, followed by treating the etched surface with hydrochloric acid species at a temperature below about 50° C. for a duration of less than about 10 minutes to remove isolated particles from the oxidized surface. This method cleans the wafer surface without increasing roughness or creating rough patches thereon, and thus provides a cleaned surface capable of providing an increased bonding energy between the first and second wafers when those surfaces are bonded together. This cleaning process is advantageously used in a thin layer removal process to fabricate a semiconductor on insulator structure.

Abstract: The invention relates to a compliant substrate (5) comprising a carrier (1) and at least one thin layer (4), formed on the surface of the carrier and intended to receive, in integral manner, a stress-giving structure. The carrier (1) and the thin layer (4) are joined to one another by joining means (3) such that the stresses brought by said structure are absorbed in whole or in part by the thin layer (4) and/or by the joining means (3) which comprise at least one joining zone chosen from among the following joining zones: a layer of microcavities and/or a bonding interface whose bonding energy is controlled to permit absorption of said stresses.

Abstract: In the fabrication of a thin-film flexible electronic device of the screen type that includes a plurality of thin-film components on a glass support a starting support is prepared, including a rigid bulk substrate and a glass sheet fastened to the rigid bulk substrate by reversible direct bonding so as to obtain a removable interface. The plurality of thin-film components are fabricated on the glass sheet. The glass sheet is separated from the rigid bulk substrate by disassembling the interface and, the glass sheet and the plurality of thin-film components are transferred to a final support.

Abstract: A microstructure of the semiconductor on insulator type with different patterns is produced by forming a stacked uniform structure including a plate forming a substrate, a continuous insulative layer and a semiconductor layer. The continuous insulative layer is a stack of at least three elementary layers, including a bottom elementary layer, at least one intermediate elementary layer, and a top elementary layer overlying the semiconductor layer, where at least one of the bottom elementary layer and the top elementary layer being of an insulative material. In the stacked uniform structure, at least two patterns are differentiated by modifying at least one of the elementary layers in one of the patterns so that the elementary layer has a significantly different physical or chemical property between the two patterns, where at least one of the bottom and top elementary layer is an insulative material that remains unchanged.

Abstract: A substrate suitable for producing a high frequency electronic circuit. This substrate includes a support substrate having a controlled amount of interstitial oxygen and which is treated to precipitate at least some of the oxygen therein; and a useful layer supported by the support substrate. Advantageously, the support substrate has high resistivity and includes oxygen precipitates beneath the useful layer while also being free of depleted zones of oxygen precipitates adjacent the useful layer. This is prepared by the methods disclosed herein which are applicable in particular to SOI substrates.

Abstract: Method to produce a structure consisting of depositing a material by columnar epitaxy on a crystalline face of a substrate (2), of continuing so that the columns (4) give a continuous layer (5). The surface is provided with a period array of bumps (3) on a nanometric scale, each bump (3) having a support zone (35) and being obtained from an array of crystalline defects and/or strain fields created within a crystalline region (16) located in the vicinity of a bonding interface (15) between two crystalline elements (11, 12) whose crystalline lattices have a twist and/or tilt angle and/or have interfacial lattice mismatch, able to condition the period (38) of the array of bumps (3). The period (38) of the array, the height (36) of the bumps and the size of their support zone (35) being adjusted so that the continuous layer (40) has a critical thickness that is greater than that obtained using epitaxy without the bumps.

Abstract: A method of separating a structure including a fragile zone delimiting two substructures to be separated, where at least one plane blade is advanced in a separation plane corresponding to a median plane of the fragile zone, from an entry edge of the structure in a direction of advance toward an exit edge of the structure, so as to cause progressive separation of the two substructures, and where the inclination of the blade in the separation plane is varied relative to the direction of advance.

Abstract: The invention relates to a process for producing a bond between a first and a second substrate (2, 4), comprising: a) a step of preparing surfaces (6, 8) to be assembled, b) an assembly of these two surfaces, by direct molecular bonding, c) a heat treatment step involving at least maintaining the temperature within the range of 50° C. to 100° C. for at least one hour.

Abstract: The invention relates to a method of producing a complex microelectronic structure, in which two basic microelectronic structures are assembled at the two respective connecting faces thereof. The invention is characterized in that, before assembly, a difference is created in the tangential stress state between the two faces to be assembled, said difference being selected such as to produce a pre-determined stress state within the assembled structure under given conditions in relations to the assembly conditions.

Abstract: The invention relates to a method for producing a semiconducting structure on a semiconducting substrate, one surface of which has a topology, this method including: a) a step for forming a first layer (24) in a first insulating material on said surface, b) a step for forming a second layer in a second insulating material (28), less dense than the first insulating material, with a thickness between 2.5 p and 3.5 p, c) a step for planarization of the assembly.

Abstract: A method of transferring a layer of a first material onto a second substrate of a second material includes, a step of forming a first embrittlement plane in a first substrate in first material, by a first ion and/or atom implantation through a first face of said substrate, a step of forming a second embrittlement plane in said first substrate, by a first ion and/or atom implantation through a second face of said substrate, in order to reduce a curvature of this first substrate, a step of assembling the first and second substrates, and a step of separating a layer from the first substrate at the level of the first embrittlement plane, without separation at the level of the second embrittlement plane.

Abstract: A process of transferring a layer of a first material from a first substrate, having defects in a zone close to the surface, onto a host substrate made of a second material includes a step of thinning the first substrate in order to form a first thinned substrate, an ion or atom implantation in the first substrate in order to form an implantation plane therein, delimiting the layer to be transferred, and a transfer of the layer onto the host substrate by fracturing the substrate along the implantation plane.

Abstract: A method for trimming a structure obtained by bonding a first wafer to a second waver on contact faces and thinning the first waver, wherein at least either the first wafer or the second wafer is chamfered and thus exposes the edge of the contact face of the first wafer, wherein the trimming concerns the first wafer. The method includes a) selecting the second wafer from among wafers with a resistance to a chemical etching planned in b) that is sufficient with respect to the first wafer to allow b) to be carried out; b) after bonding the first wafer to the second wafer, chemical etching the edge of the first wafer to form in the first wafer a pedestal resting entirely on the contact face of the second wafer and supporting the remaining of the first wafer; and c) thinning the first wafer until the pedestal is reached and attacked, to provide a thinned part of the first wafer.

Abstract: The inventive method includes a preparation step during which the substrate is covered with a layer, a pressing step in which a mould including a pattern of recesses and protrusions is pressed into part of the thickness of the aforementioned layer, at least one etching step in which the layer is etched until parts of the surface of the substrate have been stripped, and a substrate etching step whereby the substrate is etched using an etching pattern which is defined from the mould pattern. The preparation step includes a sub-step consisting of the formation of a lower sub-layer of curable material, a step involving the curing of said layer and a sub-step including the formation of an outer sub-layer which is adjacent to the cured sub-layer. Moreover, during the pressing step, the above-mentioned protrusions in the mould penetrate the outer sub-layer until contact is reached with the cured sub-layer.

Abstract: A method for direct molecular adhesion of an electronic compound (6) on a polymer (4) is described. The polymer (4) is coated with a bonding layer (5), for example silicon oxide, which enables the problems caused by the presence of hydrocarbons to be overcome. The method makes it possible to produce adhesive-free three-dimensional structures (10).

Abstract: The invention relates to an assembly method to enable local electrical bonds between zones located on a face of a first substrate and corresponding zones located on a face of a second substrate, said faces being located facing each other, at least one of the substrates having a surface topography, characterised in that the method comprises steps consisting of: forming an intermediate layer comprising at least one burial layer on the face of the substrate or substrates having a surface topography to make it (them) compatible with molecular bonding of said faces of substrates to each other from a topographic point of view, the resistivity and/or thickness of the intermediate layer being chosen to enable said local electrical bonds, bringing the two faces into contact, the substrates being positioned so as to create electrical bonds between areas located on the first substrate and the corresponding areas located on the second substrate, bonding the faces of the first and second substrates by molecular bonding

Abstract: Method to produce a structure consisting of depositing a material by columnar epitaxy on a crystalline face of a substrate (2), of continuing so that the columns (4) give a continuous layer (5). The surface is provided with a period array of bumps (3) on a nanometric scale, each bump (3) having a support zone (35) and being obtained from an array of crystalline defects and/or strain fields created within a crystalline region (16) located in the vicinity of a bonding interface (15) between two crystalline elements (11, 12) whose crystalline lattices have a twist and/or tilt angle and/or have interfacial lattice mismatch, able to condition the period (38) of the array of bumps (3). The period (38) of the array, the height (36) of the bumps and the size of their support zone (35) being adjusted so that the continuous layer (40) has a critical thickness that is greater than that obtained using epitaxy without the bumps.

Abstract: Method of preparing a silicon dioxide layer by high-temperature oxidation on a substrate of formula Si1-xGex in which x is greater than 0 and less than or equal to 1, the said method comprising the following successive steps: a) at least one additional layer of thickness hy and of overall formula Si1-yGey, in which y is greater than 0 and less than x, is deposited on the said substrate of formula Si1-xGex; and b) the high-temperature oxidation of the said additional layer of overall formula Si1-yGey is carried out, whereby the said additional layer is completely or partly converted into a layer of silicon oxide SiO2. Method of preparing an optical or electronic component, comprising at least one step for preparing an SiO2 layer using the method described above.