Patents by Inventor Hui-Ling Huang
Hui-Ling Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8950343Abstract: An adjustable table includes a table board, a first foot, a second foot, an air pressure bar and an assistant device. The first foot crossly and pivotally connects with the second foot, wherein one end of the first foot pivotally connects with a first fastener on the bottom side of the table board, and one end of the second foot pivotally connects with a pivot joint. The assistant device is fixed between the first fastener and a second fastener, wherein one end of the air pressure bar is fixed on the second fastener while the other end fixed on the assistant device. Therefore, when the air pressure bar is operated, smooth sliding of the air pressure bar is provided, whereby the structural strength of the table is reinforced.Type: GrantFiled: June 28, 2013Date of Patent: February 10, 2015Inventor: Hui-Ling Huang
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Publication number: 20140041554Abstract: A height-adjustable table includes a table board, a first foot, a second foot, an air pressure bar and an assistant device. The first foot crossly and pivotally connects with the second foot, wherein one end of the first foot pivotally connects with a first fastener on the bottom side of the table board, and one end of the second foot pivotally connects with a pivot joint. The assistant device is fixed between the first fastener and a second fastener, wherein one end of the air pressure bar is fixed on the second fastener while the other end fixed on the assistant device. Therefore, when the air pressure bar is operated, smooth sliding of the air pressure bar is provided, whereby the structural strength of the table is reinforced.Type: ApplicationFiled: June 28, 2013Publication date: February 13, 2014Inventor: Hui-Ling Huang
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Patent number: 8624918Abstract: An electronic reader which includes a storage unit, and an input unit generating signals in response to user input. In addition, a processing unit detects the signals corresponding to the user input; controls the electronic reader to enter a reading mode, and displays a file according to the user input, records a length of duration time for which the electronic reader operates in the reading mode; determines the duration time and executes a variety of protective instructions and steps depending on the length of duration time for which the electronic reader operates in the reading mode. A control method is also provided.Type: GrantFiled: June 30, 2011Date of Patent: January 7, 2014Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventors: Hui-Ling Huang, Xiao-Guang Li
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Publication number: 20120194438Abstract: An electronic reader includes a touch display screen receiving user inputs and displaying a keypad and a processing unit. The keypad includes a plurality of first keys and a plurality of second keys, the keypad selectively operable between a pinyin mode where the first keys display letters a to z, and a Chinese character mode where the first keys display Chinese characters. The processing unit controls the electronic reader to enter the Pinyin mode, displays an intended pinyin inputted by a user on one of the second keys, activates the keypad to enter into the Chinese character mode whereby according to the input of the pinyin and displays a plurality of possible Chinese characters on the first keys, selects and displays a intended Chinese character in an entry field. A Chinese pinyin input method is also provided.Type: ApplicationFiled: July 21, 2011Publication date: August 2, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.Inventors: WEI SONG, HUI-LING HUANG
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Publication number: 20120169764Abstract: An electronic reader which includes a storage unit, and an input unit generating signals in response to user input. In addition, a processing unit detects the signals corresponding to the user input; controls the electronic reader to enter a reading mode, and displays a file according to the user input, records a length of duration time for which the electronic reader operates in the reading mode; determines the duration time and executes a variety of protective instructions and steps depending on the length of duration time for which the electronic reader operates in the reading mode. A control method is also provided.Type: ApplicationFiled: June 30, 2011Publication date: July 5, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.Inventors: HUI-LING HUANG, XIAO-GUANG LI
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Publication number: 20120166943Abstract: An electronic device which comprises a storage unit to store files and a division information table, an input unit generating input signals in response to user input operations, a display unit displaying information, and a processing unit controlling the electronic device to enter into a reading mode, controlling the display unit to a page of a file, determining whether the page has a portrait layout or a horizontal layout according to the properties of the page, dividing the page into a plurality of blocks according to a division information table, controlling the display unit to display all the blocks thereon, and displaying a selected block of the page with a magnified display size according to an input signal from the user. A page display method is also provided.Type: ApplicationFiled: May 30, 2011Publication date: June 28, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.Inventors: HUI-LING HUANG, XIAO-GUANG LI, HONG-YE LIU, XIAO-LE LI
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Publication number: 20120144339Abstract: An electronic reader includes a storage unit, a display unit, and a processing unit. The processing unit displays a page of a file on the display unit, detects touch signals in response to a slide operation on an input unit; determines in real time a slide distance of a slide and a resizing proportion of the page corresponding to the slide distance to resize the page according to the real time resizing proportion; determines the number of the resized pages that can be displayed side by side in a document window of the display unit according to the last determined resizing proportion of the page; and displays the resized pages in the document window. A method for previewing files is also provided.Type: ApplicationFiled: May 17, 2011Publication date: June 7, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.Inventors: HUI-LING HUANG, XIAO-GUANG LI, QUAN-QUAN LIU, HONG-YE LIU
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Patent number: 7592262Abstract: A method for manufacturing MOS transistor with hybrid hard mask includes providing a substrate having a dielectric layer and a polysilicon layer thereon, forming a hybrid hard mask having a middle hard mask and a spacer hard mask covering sidewalls of the middle hard mask on the polysilicon layer, performing a first etching process to etch the polysilicon layer and the dielectric layer through the hybrid hard mask to form a gate structure, performing a second etching process to form recesses in the substrate at two sides of the gate structure, and performing a SEG process to form epitaxial silicon layers in each recess.Type: GrantFiled: March 21, 2007Date of Patent: September 22, 2009Assignee: United Microelectronics Corp.Inventors: Hui-Ling Huang, Ming-Shing Chen, Nien-Chung Li, Li-Shiun Chen, Hsin Tai
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Publication number: 20080233746Abstract: A method for manufacturing MOS transistor with hybrid hard mask includes providing a substrate having a dielectric layer and a polysilicon layer thereon, forming a hybrid hard mask having a middle hard mask and a spacer hard mask covering sidewalls of the middle hard mask on the polysilicon layer, performing a first etching process to etch the polysilicon layer and the dielectric layer through the hybrid hard mask to form a gate structure, performing a second etching process to form recesses in the substrate at two sides of the gate structure, and performing a SEG process to form epitaxial silicon layers in each recess.Type: ApplicationFiled: March 21, 2007Publication date: September 25, 2008Inventors: Hui-Ling Huang, Ming-Shing Chen, Nien-Chung Li, Li-Shiun Chen, Hsin Tai
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Patent number: 7268070Abstract: There is a grain phenomenon issue of rough sidewall for patterning. Thus, imprecise grain profiles would be observed. As the critical dimensions of integrated circuit microelectronics fabrication device have decreased, the effect of grain phenomenon have become more pronounced. A profile improvement method with a thermal-compressive material and a thermal-compressive process is provided to solve the grain phenomenon issue for baseline of 0.09 um generation and beyond. With this material, the profile can be improved no matter in top view or lateral view. Furthermore, there are 0.1 um IDOF improvement and better physical etching performance.Type: GrantFiled: May 27, 2003Date of Patent: September 11, 2007Assignee: United Microelectronics Corp.Inventors: Hui-Ling Huang, Benjamin Szu-Min Lin, Cheng-Chung Chen, George Liu
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Publication number: 20040241587Abstract: There is a grain phenomenon issue of rough sidewall for patterning. Thus, imprecise grain profiles would be observed. As the critical dimensions of integrated circuit microelectronics fabrication device have decreased, the effect of grain phenomenon have become more pronounced. A profile improvement method with a thermal-compressive material and a thermal-compressive process is provided to solve the grain phenomenon issue for baseline of 0.09 um generation and beyond. With this material, the profile can be improved no matter in top view or lateral view. Furthermore, there are 0.1 um IDOF improvement and better physical etching performance.Type: ApplicationFiled: May 27, 2003Publication date: December 2, 2004Inventors: Hui-Ling Huang, Benjamin Szu-Min Lin, Cheng-Chung Chen, George Liu
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Publication number: 20040106067Abstract: A method for shrinking critical dimension of semiconductor devices includes forming a first pattern of a photoresist layer on a semiconductor device layer, by performing a blanket exposing process to expose the photoresist layer and the exposed semiconductor device layer to light having a wavelength that can be absorbed by the photoresist layer to provide the photoresist layer with a predetermined energy per unit area, thereby producing photo generated acids therein. A first thermal process is performed to diffuse the photo-generated acids formed within the photoresist layer and to equalize glass transition temperature (Tg) of the photoresist layer. A second thermal process is thereafter carried out. The first thermal process is carried out under a temperature lower than Tg of the photoresist layer.Type: ApplicationFiled: November 28, 2002Publication date: June 3, 2004Inventors: Benjamin Szu-Min Lin, Hui-Ling Huang
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Patent number: 6740473Abstract: A method for shrinking critical dimension of semiconductor devices includes forming a first pattern of a photoresist layer on a semiconductor device layer, by performing a blanket exposing process to expose the photoresist layer and the exposed semiconductor device layer to light having a wavelength that can be absorbed by the photoresist layer to provide the photoresist layer with a predetermined energy per unit area, thereby producing photo generated acids therein. A first thermal process is performed to diffuse the photo-generated acids formed within the photoresist layer and to equalize glass transition temperature (Tg) of the photoresist layer. A second thermal process is thereafter carried out. The first thermal process is carried out under a temperature lower than Tg of the photoresist layer.Type: GrantFiled: November 28, 2002Date of Patent: May 25, 2004Assignee: United Microelectronics Corp.Inventors: Benjamin Szu-Min Lin, Hui-Ling Huang
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Patent number: 6680252Abstract: The present invention is directed to a method for planarizing BARC layer in dual damascene process. For forming a dual damascene interconnect structure, by use of the present invention, a planar topography of the BARC layer is achieved by chemical mechanical polishing. The present invention applies a low temperature to bake the coated BARC layer before BARC material cross-links and induces the anti-reflective characteristic. Then, the BARC layer is planarized by chemical mechanical polishing. Next, a high temperature baking of the BARC layer is provided before coating the photoresist, so formation of the BARC layer is controlled with minimized variation in surface level and has the antireflective characteristic. Thus, the profile distortion on the via and the critical dimension control for the via are improved by patterning the via on a planar and an anti-reflective surface.Type: GrantFiled: May 15, 2001Date of Patent: January 20, 2004Assignee: United Microelectronics Corp.Inventors: Anseime Chen, Hui-Ling Huang, Vencent Chang, Andersen Chang
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Publication number: 20020173152Abstract: The present invention is directed to a method for planarizing BARC layer in dual damascene process. For forming dual damascene interconnect structure, by use of the present invention, a planar topography of BARC layer is achieved by chemical mechanical polishing. The present invention applies low temperature to bake the coated BARC layer before BARC material cross-links and induces the anti-reflective characteristic. Then, the BARC layer is planarized by chemical mechanical polishing. Next, a high temperature baking of BARC layer is provided before coating the photoresist, so the BARC layer is controlled with minimized variation in surface level and has the antireflective characteristic. Thus, the profile distortion on via and the critical dimension control for via are improved by patterning via on a planar and anti-reflective surface.Type: ApplicationFiled: May 15, 2001Publication date: November 21, 2002Inventors: Anseime Chen, Hui-Ling Huang, Vencent Chang, Andersen Chang
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Publication number: 20020106588Abstract: The invention provides a lithography process for forming openings. The method comprises forming a negative photoresist layer. A first mask is used to transfer a first strip pattern to the negative photoresist layer, so that a plurality of first strips, parallel to each other, are formed. A second mask is used to transfer a second strip pattern to the negative photoresist layer, forming a plurality of second strips, parallel to each other. Because the second strip pattern is perpendicular to the first strip pattern, the combined exposure of these two patterns forms a plurality of opening patterns. A trim mask is used to transfer a pattern to the negative photoresist layer for shielding the opening patterns in specific regions and exposing the opening patterns outside the specific regions to light. The negative photoresist layer is then developed.Type: ApplicationFiled: February 12, 2001Publication date: August 8, 2002Inventors: Chien-Wen Lai, Chien-Ming Wang, Andersen Chang, Hui-Ling Huang