Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate; a first tensile dielectric layer on the substrate; a metal gate in the first tensile dielectric layer; a second tensile dielectric layer on the first tensile dielectric layer; and a contact plug in the first tensile dielectric layer and the second tensile dielectric layer. Preferably, the top surface of the contact plug is even with the top surface of the second tensile dielectric layer, and a carbon content of the second tensile dielectric layer is greater than the carbon content of the first tensile dielectric layer.

Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate; a first tensile dielectric layer on the substrate; a metal gate in the first tensile dielectric layer; a second tensile dielectric layer on the first tensile dielectric layer; and a contact plug in the first tensile dielectric layer and the second tensile dielectric layer. Preferably, the top surface of the contact plug is even with the top surface of the second tensile dielectric layer, and a carbon content of the second tensile dielectric layer is greater than the carbon content of the first tensile dielectric layer.

Abstract: A method for fabricating interlayer dielectric (ILD) layer is disclosed. The method includes the steps of first forming a first tensile dielectric layer on a substrate, and then forming a second tensile dielectric layer on the first tensile dielectric layer.

Abstract: A method for fabricating interlayer dielectric (ILD) layer is disclosed. The method includes the steps of first forming a first tensile dielectric layer on a substrate, and then forming a second tensile dielectric layer on the first tensile dielectric layer.

Abstract: A stress memorization process including the following step is provided. A gate is formed on a substrate. A low-k dielectric layer with a dielectric constant lower than 3 is formed to entirely cover the gate and the substrate. A stress layer is formed to entirely cover the low-k dielectric layer. The stress layer and the low-k dielectric layer are removed. Moreover, a semiconductor structure including a contact etch stop layer is provided. A gate is disposed on a substrate. A porous layer entirely covers the gate and the substrate. A contact etch stop layer entirely covers the porous layer, wherein the thickness of the porous layer is thinner than the thickness of the contact etch stop layer.

Abstract: A multifunction MEMS element includes a first cantilever, a second cantilever and a MEMS component. The first cantilever, the second cantilever and the MEMS component together form a MEMS structure. The MEMS component includes an inductor device.

Abstract: A microelectromechanical system (MEMS) diaphragm is provided. The MEMS diaphragm includes a first conductive layer, a second conductive layer and a first dielectric layer. The first conductive layer is disposed on a substrate and having a plurality of openings. The openings have the same dimension, and the distance between the adjacent openings is gradually increased toward the edge of the first conductive layer. The second conductive layer is disposed between the first conductive layer and the substrate. The first dielectric layer is partially disposed between the first conductive layer and the second conductive layer, so that a portion of the first conductive layer is suspended.

Abstract: A method for fabricating a semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a dielectric layer on the substrate, wherein the dielectric layer comprises metal interconnects therein; forming a top metal layer on the dielectric layer; and forming a passivation layer on the top metal layer through high-density plasma chemical vapor deposition (HDPCVD) process.

Abstract: A microelectromechanical system (MEMS) diaphragm is provided. The MEMS diaphragm includes a first conductive layer, a second conductive layer and a first dielectric layer. The first conductive layer is disposed on a substrate and having a plurality of openings. The openings having a first dimension and the openings having a second dimension are arranged alternately, and the first dimension is not equal to the second dimension. The second conductive layer is disposed between the first conductive layer and the substrate. The first dielectric layer is partially disposed between the first conductive layer and the second conductive layer, so that a portion of the first conductive layer is suspended.

Abstract: A method for fabricating a semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a dielectric layer on the substrate, wherein the dielectric layer comprises metal interconnects therein; forming a top metal layer on the dielectric layer; and forming a passivation layer on the top metal layer through high-density plasma chemical vapor deposition (HDPCVD) process.

Abstract: A method of transferring a wafer is disclosed. The method comprises providing a pedestal and at least one spray orifice extending through the pedestal; disposing a wafer above the pedestal using a first robot, wherein the wafer has a first surface and a second surface, the first surface faces the pedestal, a fluid is sprayed onto the first surface simultaneously to avoid a contact of the first surface with the pedestal, and the fluid contains a charge-forming chemical substance dissolved therein; and taking the wafer using a robot for delivery. Due to the charge-forming chemical substance dissolved in the fluid, the waterfall effect to cause discharge damage on the wafer is avoided in the spraying of the fluid.

Abstract: A microelectromechanical system (MEMS) diaphragm is provided. The MEMS diaphragm includes a first conductive layer, a second conductive layer and a dielectric layer. The first conductive layer is disposed on a substrate and having a plurality of openings. The dimenisons of the openings are gradually reduced toward the edge of the first conductive layer. The second conductive layer is disposed between the first conductive layer and the substrate. The dielectric layer is partially disposed between the first conductive layer and the second conductive layer, so that a portion of the first conductive layer is suspended.

Abstract: An integrated structure of MEMS device and CIS device and a fabricating method thereof includes providing a substrate having a CIS region and a MEMS region defined therein with a plurality of CIS devices positioned in the CIS region; performing a multilevel interconnect process to form a multilevel interconnect structure in the CIS region and the MEMS region and a micro-machined mesh metal in the MEMS region on a front side of the substrate; performing a first etching process to form a chamber in MEMS region in the front side of the substrate; forming a first mask pattern and a second mask pattern respectively in the CIS region and the MEMS region on a back side of the substrate; and performing a second etching process to form a plurality of vent holes connecting to the chamber on the back side of the substrate through the second mask pattern.

Abstract: The fluid-confining apparatus includes at least a substrate holder, at least a confining fluid supplying tube, at least a confining fluid recovering tube, at least a process fluid supplying tube, and at least a process fluid recovering tube. The process fluid supplying tube supplies at least a process fluid, and makes the process fluid contact with at least a treatment region of a wafer. The confining fluid supplying tube continuity supplies at least a confining fluid. The confining fluid does not dissolve the process fluid. The flowing confining fluid can contact with at least a non-treatment region of the wafer, and confines the process fluid into a predetermined space.

Abstract: A semiconductor device is disclosed. The semiconductor device includes: a first electrode, disposed over a first region of a substrate; and a conductive layer, disposed over the substrate, including a second electrode disposed above the first electrode, wherein the second electrode comprises a mesh main part having a plurality of openings, and a plurality of extending parts, wherein the extending parts are connected to the mesh main part at periphery of the openings and extend toward a surface of the first electrode.

Abstract: A method of fabricating a micro-electromechanical system microphone structure is disclosed. First, a substrate defining a MEMS region and a logic region is provided, and a surface of the substrate has a dielectric layer thereon. Next, at least one metal interconnect layer is formed on the dielectric layer in the logic region, and at least one micro-machined metal mesh is simultaneously formed in the dielectric layer of the MEMS region. Therefore, the thickness of the MEMS microphone structure can be effectively reduced.

Abstract: A method of fabricating a micro-electromechanical system microphone structure is disclosed. First, a substrate defining a MEMS region and a logic region is provided, and a surface of the substrate has a dielectric layer thereon. Next, at least one metal interconnect layer is formed on the dielectric layer in the logic region, and at least one micro-machined metal mesh is simultaneously formed in the dielectric layer of the MEMS region. Therefore, the thickness of the MEMS microphone structure can be effectively reduced.

Abstract: A contact efuse structure includes a silicon layer and a contact contacting the silicon layer with one end. When a voltage is applied to the contact, a void is formed at the end of the contact, and thus the contact is open. Such structure may be utilized in an efuse device or a read only memory. A method of making a contact efuse device and a method of making a read only memory are also disclosed.

Abstract: A microelectromechanical system (MEMS) diaphragm is provided. The MEMS diaphragm includes a first conductive layer, a second conductive layer and a first dielectric layer. The first conductive layer is disposed on a substrate and having a plurality of openings. The openings have the same dimension, and the distance between the adjacent openings is gradually increased toward the edge of the first conductive layer. The second conductive layer is disposed between the first conductive layer and the substrate. The first dielectric layer is partially disposed between the first conductive layer and the second conductive layer, so that a portion of the first conductive layer is suspended.

Abstract: A microelectromechanical system (MEMS) diaphragm is provided. The MEMS diaphragm includes a first conductive layer, a second conductive layer and a first dielectric layer. The first conductive layer is disposed on a substrate and having a plurality of openings. The openings having a first dimension and the openings having a second dimension are arranged alternately, and the first dimension is not equal to the second dimension. The second conductive layer is disposed between the first conductive layer and the substrate. The first dielectric layer is partially disposed between the first conductive layer and the second conductive layer, so that a portion of the first conductive layer is suspended.