Patents by Inventor Hui-Yen Huang

Hui-Yen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11934106
    Abstract: An optical proximity correction (OPC) device and method is provided. The OPC device includes an analysis unit, a reverse pattern addition unit, a first OPC unit, a second OPC unit and an output unit. The analysis unit is configured to analyze a defect pattern from a photomask layout. The reverse pattern addition unit is configured to provide a reverse pattern within the defect pattern. The first OPC unit is configured to perform a first OPC procedure on whole of the photomask layout. The second OPC unit is configured to perform a second OPC procedure on the defect pattern of the photomask layout to enhance an exposure tolerance window. The output unit is configured to output the photomask layout which is corrected.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: March 19, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Yen Liu, Hui-Fang Kuo, Chian-Ting Huang, Wei-Cyuan Lo, Yung-Feng Cheng, Chung-Yi Chiu
  • Publication number: 20230343666
    Abstract: A packaging method and a package structure are provided. The packaging method includes the following steps. Firstly, a plurality of chips are disposed on a carrying surface of a carrying board for chip redistribution. Each of the chips includes a first side connected to the carrying surface and a second side opposite to the first side, and the second side is provided with at least one chip connecting member. Next, a base structure is provided. The base structure has a bonding surface provided with a plurality of predetermined areas for bonding the chips respectively, and each of the predetermined regions has at least one electrically connecting structure formed therein. Lastly, an encapsulating material is applied to integrate the base structure, the chips, and the carrying board into a unitary structure under specific hot pressing conditions.
    Type: Application
    Filed: July 13, 2022
    Publication date: October 26, 2023
    Inventors: CHIN-JUI LIANG, Hui-Yen Huang, PING-LUNG WANG
  • Patent number: 11699675
    Abstract: A semiconductor device with high heat dissipation efficiency includes a base structure, a semiconductor chip, a heat dissipating structure, and a package body. The semiconductor chip is disposed on the base structure and has a first surface distant from the base structure. The heat dissipating structure includes a buffer layer and a first heat spreader. The buffer layer is disposed on the first surface of the semiconductor chip and a coverage rate thereof on the first surface is at least 10%. The first heat spreader is disposed on the buffer layer and bonded to the first surface of the semiconductor chip through the buffer layer. The package body encloses the semiconductor chip and the heat dissipating structure, and the package body and the buffer layer have the same heat curing temperature.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: July 11, 2023
    Assignee: HARVATEK CORPORATION
    Inventors: Chin-Jui Liang, Hui-Yen Huang, Ping-Lung Wang
  • Publication number: 20230215786
    Abstract: A planar multi-chip device includes a base structure and a plurality of functional chips. The base structure has a central area and a peripheral area outside the central area. The central area includes a first conductive portion arranged therein. The peripheral area includes a plurality of second conductive portions and a plurality of third conductive portions arranged therein and separated from each other. The functional chips are arranged on the base structure, and each of the functional chips has a portion located on and electrically connected to the first conductive portion. At least two of the functional chips are configured to be in signal communication with each other via at least one of the third conductive portions.
    Type: Application
    Filed: March 10, 2022
    Publication date: July 6, 2023
    Inventors: CHIN-JUI LIANG, Hui-Yen Huang, FENG-HUI CHUANG, PING-LUNG WANG
  • Publication number: 20230215785
    Abstract: A vertical type multi-chip device includes a base structure, an intermediate layer, a first functional chip, and a second functional chip. The intermediate layer is disposed on the base structure and has a first signal transmission path and a second signal transmission path. The first functional chip is embedded in the intermediate layer and electrically connected to the base structure. The second functional chip is disposed on the intermediate layer and configured to be electrically connected to the first functional chip via the first signal transmission path and to the base structure via the second signal transmission path.
    Type: Application
    Filed: March 8, 2022
    Publication date: July 6, 2023
    Inventors: CHIN-JUI LIANG, Hui-Yen Huang, FENG-HUI CHUANG, PING-LUNG WANG
  • Publication number: 20220359451
    Abstract: A semiconductor device with high heat dissipation efficiency includes a base structure, a semiconductor chip, a heat dissipating structure, and a package body. The semiconductor chip is disposed on the base structure and has a first surface distant from the base structure. The heat dissipating structure includes a buffer layer and a first heat spreader. The buffer layer is disposed on the first surface of the semiconductor chip and a coverage rate thereof on the first surface is at least 10%. The first heat spreader is disposed on the buffer layer and bonded to the first surface of the semiconductor chip through the buffer layer. The package body encloses the semiconductor chip and the heat dissipating structure, and the package body and the buffer layer have the same heat curing temperature.
    Type: Application
    Filed: July 27, 2021
    Publication date: November 10, 2022
    Inventors: Chin-Jui LIANG, Hui-Yen HUANG, Ping-Lung WANG
  • Patent number: 10084123
    Abstract: An LED package structure without pre-stored power sources includes a substrate unit and a LED chip. The substrate unit includes a carrier substrate, a positive conductive pin, and a negative conductive pin. The positive conductive pin is made of a first predetermined material with positive oxidation-reduction potential. The negative conductive pin is made of a second predetermined material with negative oxidation-reduction potential. The LED chip is disposed on the carrier substrate and electrically connected between the positive conductive pin and the negative conductive pin. Both the positive conductive pin and the negative conductive pin concurrently contact a predetermined liquid for generating oxidation-reduction reaction so as to generate electric powers with a predetermined driving voltage, and the LED chip is driven by the electric powers with the predetermined driving voltage for generating an indicator light source.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: September 25, 2018
    Assignee: HARVATEK CORPORATION
    Inventors: Hsin I Lu, Yu Ping Wang, Chia Pin Chang, Hui Yen Huang
  • Patent number: 9887179
    Abstract: A light emitting diode device including a substrate, a plurality of light emitting elements, and an encapsulant. The substrate has a front surface and a back surface opposite to the front surface. The substrate includes a first portion and a second portion. The first portion has a plurality of light-penetrating holes. The second portion is separated from the first portion. The light emitting elements are disposed adjacent to the light-penetrating holes and on the front surface of the first portion. The encapsulant is disposed on the front surface of the substrate, and covers the light emitting elements.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: February 6, 2018
    Assignee: Harvatek Corporation
    Inventors: Hsin-I Lu, Hui-Yen Huang, Yu-Ching Kuo, Yu-Ping Wang, Jen-Hung Chang
  • Publication number: 20170033270
    Abstract: An LED package structure without pre-stored power sources includes a substrate unit and a LED chip. The substrate unit includes a carrier substrate, a positive conductive pin, and a negative conductive pin. The positive conductive pin is made of a first predetermined material with positive oxidation-reduction potential. The negative conductive pin is made of a second predetermined material with negative oxidation-reduction potential. The LED chip is disposed on the carrier substrate and electrically connected between the positive conductive pin and the negative conductive pin. Both the positive conductive pin and the negative conductive pin concurrently contact a predetermined liquid for generating oxidation-reduction reaction so as to generate electric powers with a predetermined driving voltage, and the LED chip is driven by the electric powers with the predetermined driving voltage for generating an indicator light source.
    Type: Application
    Filed: January 19, 2016
    Publication date: February 2, 2017
    Inventors: Hsin I Lu, Yu Ping Wang, Chia Pin Chang, Hui Yen Huang
  • Publication number: 20160155727
    Abstract: A light emitting diode device including a substrate, a plurality of light emitting elements, and an encapsulant. The substrate has a front surface and a back surface opposite to the front surface. The substrate includes a first portion and a second portion. The first portion has a plurality of light-penetrating holes. The second portion is separated from the first portion. The light emitting elements are disposed adjacent to the light-penetrating holes and on the front surface of the first portion. The encapsulant is disposed on the front surface of the substrate, and covers the light emitting elements.
    Type: Application
    Filed: March 26, 2015
    Publication date: June 2, 2016
    Inventors: Hsin-I LU, Hui-Yen HUANG, Yu-Ching KUO, Yu-Ping WANG, Jen-Hung CHANG
  • Patent number: 8137999
    Abstract: A method for fabricating a LED includes: providing a metal substrate; etching the metal substrate to form a first terminal, a second terminal, and a gap between the first terminal and the second terminal, wherein the first terminal has at least one first etching concave and the second terminal has at least one second etching concave; placing at least one LED chip in the at least one first etching concave, wherein the at least one LED chip has a first electrode and a second electrode; electrically connecting the first electrode with the first terminal, and electrically connecting the second electrode with the second terminal; and then covering the at least one LED chip with synthetic polymer, wherein the synthetic polymer is filled into the at least one first etching concave, the at least one second etching concave and the gap to connect the first terminal with the second terminal.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: March 20, 2012
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang
  • Publication number: 20110300649
    Abstract: A method for fabricating a LED includes: providing a metal substrate; etching the metal substrate to form a first terminal, a second terminal, and a gap between the first terminal and the second terminal, wherein the first terminal has at least one first etching concave and the second terminal has at least one second etching concave; placing at least one LED chip in the at least one first etching concave, wherein the at least one LED chip has a first electrode and a second electrode; electrically connecting the first electrode with the first terminal, and electrically connecting the second electrode with the second terminal; and then covering the at least one LED chip with synthetic polymer, wherein the synthetic polymer is filled into the at least one first etching concave, the at least one second etching concave and the gap to connect the first terminal with the second terminal.
    Type: Application
    Filed: August 22, 2011
    Publication date: December 8, 2011
    Applicant: HARVATEK CORPORATION
    Inventors: BILY WANG, JONNIE CHUANG, HUI-YEN HUANG
  • Patent number: 7842964
    Abstract: A front and rear covering type LED package structure includes an insulating body, a substrate unit, at least one light-emitting element, and a package colloid. The insulating body has a receiving space. The substrate unit has two electrode pins separated from each other. Each electrode pin has one side covered by the insulating body. Each electrode pin has another side bent into a U-shape and exposed outside the insulating body in order to cover two opposite lateral sides and front and rear sides of the insulating body by a front and rear covering method. The at least one light-emitting element is received in the receiving space and electrically connected with the two electrode pins of the substrate unit. The package colloid is filled into the receiving space of the insulating body.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: November 30, 2010
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang, Chao-Yuan Huang
  • Patent number: 7824938
    Abstract: An LED chip package structure with thick guiding pin includes a plurality of conductive pins separated from each other, an insulative casing, a plurality of LED chips, and a packaging colloid. The insulative casing covers a bottom side of each conductive pin to form an injection concave groove for exposing a top surface of each conductive pin. Two lateral sides of each conductive pin are extended outward from the insulative casing. The LED chips are arranged in the injection concave groove, and each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with different conductive pins. In addition, the packaging colloid is filled into the injection concave groove for covering the LED chips.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: November 2, 2010
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang
  • Patent number: 7803641
    Abstract: A mold structure for packaging LED chips includes a top mold and a bottom mold. The bottom mold is mated with the top mold. The bottom mold has a main flow channel, a plurality of receiving spaces formed beside the main flow channel, a plurality of secondary flow channels for respectively and transversely communicating the receiving spaces with each other, and a plurality of ejection pins penetrating through the bottom mold.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: September 28, 2010
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang
  • Patent number: 7671374
    Abstract: An LED chip package structure with thick guiding pin includes a plurality of conductive pins separated from each other, an insulative casing, a plurality of LED chips, and a packaging colloid. The insulative casing covers a bottom side of each conductive pin to form an injection concave groove for exposing a top surface of each conductive pin. Two lateral sides of each conductive pin are extended outward from the insulative casing. The LED chips are arranged in the injection concave groove, and each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with different conductive pins. In addition, the packaging colloid is filled into the injection concave groove for covering the LED chips.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: March 2, 2010
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang
  • Patent number: 7662661
    Abstract: A method of manufacturing a substrate structure includes the steps of: (1) providing a metal substrate having a metal portion; (2) chemically etching a plurality of trenches in the metal substrate; (3) applying a polymer composite material into the trenches to form a substrate having a polymer composite portion abutted to the metal portion; (4) polishing a surface of the substrate to make a height of the polymer composite portion equal to that of the metal portion; (5) forming a covering material on the surface of the substrate; and (6) cutting the substrate via the polymer composite portion for decreasing cutting bur produced on the metal portion. Furthermore, the method is provided for combining the metal substrate and the polymer composite material, thereby to increase cutting precision and strength of the substrate structure.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: February 16, 2010
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang
  • Publication number: 20090239319
    Abstract: A package for an LED, comprises a metal substrate, at least one LED chip, and an insulative housing, wherein the metal substrate has a first terminal and a second terminal, and the first terminal is formed with a recess. The at least one LED chip is arranged in the recess of the first terminal of the metal substrate, wherein the chip is electrically connected with the first terminal and the second terminal of the metal substrate. Since the insulative housing caps the chip and the metal substrate, and the LED package can be reduced in size.
    Type: Application
    Filed: April 17, 2009
    Publication date: September 24, 2009
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang
  • Publication number: 20090186434
    Abstract: An LED chip package structure with thick guiding pin includes a plurality of conductive pins separated from each other, an insulative casing, a plurality of LED chips, and a packaging colloid. The insulative casing covers a bottom side of each conductive pin to form an injection concave groove for exposing a top surface of each conductive pin. Two lateral sides of each conductive pin are extended outward from the insulative casing. The LED chips are arranged in the injection concave groove, and each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with different conductive pins. In addition, the packaging colloid is filled into the injection concave groove for covering the LED chips.
    Type: Application
    Filed: March 24, 2009
    Publication date: July 23, 2009
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang
  • Publication number: 20090050922
    Abstract: A front and rear covering type LED package structure includes an insulating body, a substrate unit, at least one light-emitting element, and a package colloid. The insulating body has a receiving space. The substrate unit has two electrode pins separated from each other. Each electrode pin has one side covered by the insulating body. Each electrode pin has another side bent into a U-shape and exposed outside the insulating body in order to cover two opposite lateral sides and front and rear sides of the insulating body by a front and rear covering method. The at least one light-emitting element is received in the receiving space and electrically connected with the two electrode pins of the substrate unit. The package colloid is filled into the receiving space of the insulating body.
    Type: Application
    Filed: December 28, 2007
    Publication date: February 26, 2009
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang, Chao-Yuan Huang