Abstract: A body structure of a portable computer including a case, a keyboard module, a touch pad module, and a cover. The case has an inner surface and an exterior surface opposite to each other, and the exterior surface is exposed to an outer environment. The case further has a first receiving opening, a second receiving opening, and a rib structure separating the first and the second receiving openings. The keyboard module is assembled to the second receiving opening from the exterior surface and locked at the rib structure. The touch pad module is assembled to the first receiving opening from the exterior surface and locked at the rib structure. The cover is assembled to the case and covers the rib structure.

Abstract: An open-ear Bluetooth® earphone includes an earphone body and a support frame. The support frame is configured to be plugged into a cavum concha of a wearer. The earphone body is provided with an audio source, and the support frame is installed on the earphone body and corresponds to the audio source. When in use, the support frame is configured to be firmly plugged into the cavum concha of the wearer to allow the earphone body to be worn on the ear of the wearer. The audio source corresponds to the ear canal of the wearer through the support frame, so that the sound emitted from the audio source is transmitted into the ear canal through the support frame. The audio source is directly opposite of the ear canal through the support frame to shorten the distance between the audio source and the ear canal.

Abstract: An open-ear earphone includes a housing, a chamber is provided inside the housing, a speaker is provided inside the chamber and divides the chamber into a front chamber and a rear chamber. The housing is provided with a first sound hole and a second sound hole. The front chamber is communicated to the outside through the first sound hole, and the rear chamber is communicated to the outside through the second sound hole. The rear chamber includes a first volume down chamber and a second volume down chamber communicated to the first volume down chamber, and the first volume down chamber is located between the speaker and the second volume down chamber. The sound wave in backward motion generated by the speaker is transmitted to the outside from the second sound hole after being reduced by the first volume down chamber and the second volume down chamber.

Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.

Abstract: A light emission apparatus includes a laser diode configured to emit a light; a laser driver electrically coupled to the laser diode, the laser driver being configured to drive the laser diode to generate the light; and an optical module arranged to receive the light emitted by the laser diode, the optical module comprising at least one optical element and being configured to adjust the light and emits a transmitting light; wherein the transmitting light emits from the optical module with an illumination angle and the optical module adjusts the light to vary the illumination angle.

Abstract: A semiconductor memory device includes a substrate having a memory area and a logic circuit area thereon, a first interlayer dielectric layer on the substrate, and a second interlayer dielectric layer on the substrate. An embedded memory cell structure is disposed within the memory area between the first interlayer dielectric layer and the second interlayer dielectric layer. The second interlayer dielectric layer includes a first portion covering the embedded memory cell structure within the memory area and a second portion covering the logic circuit area. A top surface of the first portion is coplanar with a top surface of the second portion.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.

Abstract: A cabling structure of a foldable electronic device includes a first body, a second body, a hinge module connecting the first body and the second body, a sliding member movably disposed in the second body, a flexible electrical connecting member connected to the first body, the second body, and the sliding member and being driven when the first body and the second body are rotated relatively, and a restoring module disposed in the second body and providing a force to the sliding member. The first body and the second body are rotated relatively to each other through the hinge module. When being rotated relatively to each other, the first body and the second body drive the flexible electrical connecting member and the sliding member. The restoring module restores the sliding member and the flexible electrical connecting member via the force.

Abstract: A foldable electronic device is provided, including a first body, a second body, a supporting member, a first hinge connecting the first body and the supporting member, a second hinge connecting the supporting member and the second body, and a gravity-type latch movably disposed in the supporting member. The first body and the supporting member are rotated relatively to be folded or unfolded via the first hinge, and the second body and the supporting member are rotated relatively to be folded or unfolded via the second hinge. In a transforming process of the first body folding to the supporting member and together unfolding relative to the second body, the gravity-type latch is latched onto the first body once the unfolding angle is less than a predetermined value, and the gravity-type latch is de-latched from the first body once the unfolding angle is equal to or greater than the predetermined value.

Abstract: A method for fabricating semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a metal interconnection in the IMD layer, forming a magnetic tunneling junction (MTJ) on the metal interconnection, and performing a trimming process to shape the MTJ. Preferably, the MTJ includes a first slope and a second slope and the first slope is less than the second slope.

Abstract: An electrical connector assembly includes: a male connector, provided with a conductive shell; a first substrate, accommodated in the conductive shell and used to transmit receiving signals; a second substrate, accommodated in the conductive shell and used to transmit sending signals; a shielding sheet, located between the first substrate and the second substrate; a female connector, provided with a first conductive body and a second conductive body; a plurality of first signal terminals, accommodated in the first conductive body and used to transmit receiving signals; and a plurality of second signal terminals, accommodated in the second conductive body and used to transmit sending signals. The first signal terminals and the first substrate are electrically contacted to each other. The second signal terminals and the second substrate are electrically contacted to each other. The first conductive body and/or the second conductive body are used to lap joint with the shielding sheet.

Abstract: A foldable electronic device, including a first body, a second body, an air valve movably disposed in the first body, at least one triggering member, and a hinge connecting the first body and the second body, is provided. The first body has multiple openings respectively located at two opposite surfaces. The triggering member is movably disposed in the first body and has a part exposed outside the first body. The air valve and the triggering member are mutually on moving paths of each other. The first body and the second body are rotated to be folded or unfolded relative to each other by the hinge. A part of the triggering member is suitable for bearing a force such that the triggering member drives the air valve, so that the air valve opens or closes the openings.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.

Abstract: An optical proximity correction (OPC) device and method is provided. The OPC device includes an analysis unit, a reverse pattern addition unit, a first OPC unit, a second OPC unit and an output unit. The analysis unit is configured to analyze a defect pattern from a photomask layout. The reverse pattern addition unit is configured to provide a reverse pattern within the defect pattern. The first OPC unit is configured to perform a first OPC procedure on whole of the photomask layout. The second OPC unit is configured to perform a second OPC procedure on the defect pattern of the photomask layout to enhance an exposure tolerance window. The output unit is configured to output the photomask layout which is corrected.

Abstract: Embodiments provide a core network selection method, an apparatus, and a system. The method includes the following steps: obtaining first dedicated core network (DCN) information from an access network device, where the first DCN information includes information about at least one DCN that can be accessed by the access network device. The method also includes selecting a to-be-accessed DCN from the at least one DCN according to the first DCN information, and sending information about the to-be-accessed DCN to the access network device, so that the access network device determines a core network device according to the information about the to-be-accessed DCN.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.

Abstract: Devices and methods are described for reducing etching due to Galvanic Effect within a printed circuit board (PCB) that may be used in an electronic device. Specifically, a contact trace is coupled to a contact finger that has a substantially larger surface area than the contact trace. The contact finger is configured to couple the electronic device to a host device. The contact trace is electrically isolated from the rest of the PCB circuitry during a fabrication process by a separation distance between an exposed portion of the contact trace and an impedance trace. The contact finger and the exposed portion of the contact trace are plated with a common material to reduce galvanic etching of the contact trace during fabrication. The contact trace is then connected to the impedance trace using a solder joint.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.

Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.