Abstract: A method for forming a photoresist layer on a semiconductor device is disclosed. An exemplary includes providing a wafer. The method further includes spinning the wafer during a first cycle at a first speed, while a pre-wet material is dispensed over the wafer and spinning the wafer during the first cycle at a second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer during a second cycle at the first speed, while the pre-wet material continues to be dispensed over the wafer and spinning the wafer during the second cycle at the second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer at a third speed, while a photoresist material is dispensed over the wafer including the pre-wet material.

Abstract: A semiconductor device includes a semiconductor substrate, a first active region in the semiconductor substrate, and a second active region in the semiconductor substrate. The semiconductor device further includes a first conductive line over the semiconductor substrate electrically connected to the first active region and having a first end face adjacent to the second active region, and the first end face having an image log slope of greater than 15 ?m-1.

Abstract: Some embodiments relate to a method for processing a workpiece. In the method, a first photoresist layer is provided over the workpiece, wherein the first photoresist layer has a first photoresist tone. The first photoresist layer is patterned to provide a first opening exposing a first portion of the workpiece. A second photoresist layer is then provided over the patterned first photoresist layer, wherein the second photoresist layer has a second photoresist tone opposite the first photoresist tone. The second photoresist layer is then patterned to provide a second opening that at least partially overlaps the first opening to define a coincidentally exposed workpiece region. A treatment is then performed on the coincidentally exposed workpiece region. Other embodiments are also disclosed.

Abstract: A mask substrate, photomask and method for forming the same are provided. The photomask includes a substantially light transparent substrate and a circuitry pattern disposed over the light transparent substrate. The circuitry pattern includes a phase shifting layer disposed over the substantially light transparent substrate. A substantially light shielding layer is disposed over the phase shifting layer. At least one barrier layer is disposed over the substantially light shielding layer. An uppermost portion of the substantially light shielding layer does not comprise anti-reflective properties and the at least one barrier layer comprises an uppermost hardmask layer and an underlying anti-reflective layer.

Abstract: A method is described including forming a first photoresist feature and a second photoresist feature on a semiconductor substrate. A chemical material coating is formed on the semiconductor substrate. The chemical material coating interposes the first and second photoresist features. The semiconductor substrate is then rinsed; the rinsing removes the chemical material coating from the semiconductor substrate. The chemical material may mix with a residue disposed on the substrate between the first and second photoresist features. Removing the chemical material coating from the substrate may also remove the residue.

Abstract: A pattern on a semiconductor substrate is formed using two separate etching processes. The first etching process removes a portion of an intermediate layer above an active region of the substrate. The second etching process exposes a portion of the active region of the substrate. A semiconductor device formed using the patterning method has a decreased mask error enhancement factor and increased critical dimension uniformity than the prior art.

Abstract: A method includes forming a plurality of image sensors on a front side of a semiconductor substrate, and forming a dielectric layer on a backside of the semiconductor substrate. The dielectric layer is over the semiconductor substrate. The dielectric layer is patterned into a plurality of grid-filling regions, wherein each of the plurality of grid-filling regions overlaps one of the plurality of image sensors. A metal layer is formed on top surfaces and sidewalls of the plurality of grid-filling regions. The metal layer is etched to remove horizontal portions of the metal layer, wherein vertical portions of the metal layer remain after the step of etching to form a metal grid. A transparent material is filled into grid openings of the metal grid.

Abstract: A method of making a lithography mask with a stress-relief treatment is disclosed. The method includes providing a substrate and depositing an opaque layer on the substrate. The opaque layer is patterned to form a patterned mask. A stress-relief treatment is applied to the patterned mask by using an radiation exposure.

Abstract: Semiconductor devices and manufacturing methods thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece with a first region having a plurality of first features and a second region having a plurality of second features proximate the first region. The first region and the second region share a patterning overlap region disposed between the first region and the second region. The patterning overlap region includes a residue feature with an aspect ratio of about 4 or less.

Abstract: Some embodiments relate to a method for processing a workpiece. In the method, an anti-reflective coating layer is provided over the workpiece. A first patterned photoresist layer, which has a first photoresist tone, is provided over the anti-reflective coating layer. A second patterned photoresist layer, which has a second photoresist tone opposite the first photoresist tone, is provided over the first patterned photoresist layer. An opening extends through the first and second patterned photoresist layers to allow a treatment to be applied to the workpiece through the opening. Other embodiments are also disclosed.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes dispensing a liquid on a wafer. The method includes raising the wafer. The method includes lowering the wafer after the raising. The wafer is spun as it is lowered, thereby removing at least a portion of the liquid from the wafer. The present disclosure also provides an apparatus for fabricating a semiconductor device. The apparatus includes a wafer chuck that is operable to hold a semiconductor wafer and secure the wafer thereto. The wafer has a front surface and a back surface. The apparatus includes a dispenser that is operable to dispense a liquid to the front surface of the wafer. The apparatus includes a mechanical structure that is operable to: spin the wafer chuck in a horizontal direction; and move the wafer chuck downwards in a vertical direction while the wafer chuck is being rotated.

Abstract: A pattern on a semiconductor substrate is formed using two separate etching processes. The first etching process removes a portion of an intermediate layer above an active region of the substrate. The second etching process exposes a portion of the active region of the substrate. A semiconductor device formed using the patterning method has a decreased mask error enhancement factor and increased critical dimension uniformity than the prior art.

Abstract: A method of forming a semiconductor structure includes forming an opening in a substrate. A dielectric layer is formed and substantially conformal to the opening. A sacrificial structure is formed within the opening, covering a portion of the dielectric layer. A portion of the dielectric layer is removed by using the sacrificial structure as an etch mask layer. The sacrificial structure is removed.

Abstract: Some embodiments relate to a method for processing a workpiece. In the method, a first photoresist layer is provided over the workpiece, wherein the first photoresist layer has a first photoresist tone. The first photoresist layer is patterned to provide a first opening exposing a first portion of the workpiece. A second photoresist layer is then provided over the patterned first photoresist layer, wherein the second photoresist layer has a second photoresist tone opposite the first photoresist tone. The second photoresist layer is then patterned to provide a second opening that at least partially overlaps the first opening to define a coincidentally exposed workpiece region. A treatment is then performed on the coincidentally exposed workpiece region. Other embodiments are also disclosed.

Abstract: Provided is a lithography system operation to include a first aperture or a second aperture. Each of the first and second apertures has two pairs of radiation-transmitting regions where one pair of radiation-transmitting regions are larger than a second pair. For an aperture, each pair of radiation-transmitting regions are on different diametrical axis. In an embodiment, one aperture is used for x-dipole illumination and the second aperture is used for y-dipole illumination.

Abstract: A fan assembly structure is provided. The fan assembly structure comprises a fan, an air-flow guiding structure and a fixing component. The air-flow guiding structure has a plurality of air-flow guiding holes, a leaning portion and a plurality of first locking portions distributed on the leaning portion. The fixing component has a plurality of second locking portions. The fan is pivotally connected with the fixing component. The second locking portion is adapted to rotate by an angle with respect to the leaning portion to lock with the corresponding first locking portion. Thereby, the fan is disposed on the air-flow guiding structure by only the fixing component.

Abstract: A method for planarizing a semiconductor device includes providing a substrate having at least one opening therein, each opening defining a lower portion and an upper portion; coating a light sensitive material layer over the substrate, the light sensitive material layer covering the lower and upper portions of the at least one opening; etching back the light sensitive material layer to expose the upper portion of the at least one opening; repeating the steps of coating and etching to remove a predetermined amount below the upper portion of the at least one opening; depositing an insulating layer over the substrate; and planarizing the insulating layer until the upper portion of the at least one opening is exposed.

Abstract: A method of forming a semiconductor structure includes forming an opening in a substrate. A dielectric layer is formed and substantially conformal to the opening. A sacrificial structure is formed within the opening, covering a portion of the dielectric layer. A portion of the dielectric layer is removed by using the sacrificial structure as an etch mask layer. The sacrificial structure is removed.

Abstract: Methods and systems for lithographically exposing a substrate based on a curvature profile of the substrate.

Abstract: A hard mask layer and a developable bottom anti-reflective coating (dBARC) layer are formed over a dielectric layer of a substrate. A first photosensitive layer is formed above the dBARC layer, exposed, and developed to form a first pattern. The dBARC layer is developed. The first pattern is etched into the hard mask layer to form a first pattern of openings in the hard mask layer. Following removal of the first photosensitive layer, a second photosensitive layer is formed within the first pattern of openings. The second photosensitive layer is exposed and developed to form a second pattern. The dBARC layer is developed. The second pattern is etched into the hard mask layer to form a second pattern of openings in the hard mask layer. Following the removal of the second photosensitive layer and the dBARC layer, the first and the second patterns are etched into the dielectric layer.