Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.

Abstract: A photovoltaic (PV) system is disclosed that provides dynamic regulation of the output of a PV array such that the inverter can safely operate without entering a voltage protection mode. The PV system includes a PV array that generates a direct current (DC) output from received solar radiation and a DC link coupled to the PV array to receive the DC output therefrom. The PV system also includes a DC-to-AC power inverter electrically coupled to the DC link to receive the DC output therefrom and invert the DC output to an AC output and a damping circuit electrically coupled to the DC link and positioned between the PV array and the DC-to-AC power inverter. The damping circuit includes a damping resistor and a damping switch.

Abstract: A photovoltaic (PV) system is disclosed that provides dynamic regulation of the output of a PV array such that the inverter can safely operate without entering a voltage protection mode. The PV system includes a PV array that generates a direct current (DC) output from received solar radiation and a DC link coupled to the PV array to receive the DC output therefrom. The PV system also includes a DC-to-AC power inverter electrically coupled to the DC link to receive the DC output therefrom and invert the DC output to an AC output and a damping circuit electrically coupled to the DC link and positioned between the PV array and the DC-to-AC power inverter. The damping circuit includes a damping resistor and a damping switch.

Abstract: A footwear construction including a sole and an adjustable heel element selectively rotatable about an axis of rotation to configure the heel element in a fitness mode or a stability mode. The heel element can include a ground contacting surface having a first performance contour and a second, different performance contour. In the fitness mode, the first performance contour is positioned rearward of the second performance contour to provide a rolling/rocking motion when the heel region of the footwear engages a walking surface in a gait cycle. In the stability mode, the second performance contour is positioned rearward of the first performance contour to provide a stable impact when the heel region engages a walking surface. The footwear can include an actuator to enable the heel element to rotate and locking elements to hold the heel element in a fixed rotational position. A related method of use also is provided.

Abstract: A network switch system that includes a plurality of first-level switches operating in a slave mode, the first-level switches providing a plurality of local ports for receiving and sending network packets, and a plurality of second-level switches operating in one of brain mode or master mode, wherein, the first-level switches includes a plurality of upward ports connecting to the second-level switches, each of the first-level switches and the second-level switches having a forwarding database, wherein the first-level switches sends the refresh packets to the second-level switches for synchronizing the forwarding databases of the second-level switches, wherein the second-level switches providing packet communications among the first-level switches, and wherein a second-level switch operating in the brain mode providing refresh packets to the first-level switches for synchronizing the forwarding databases of the first-level switches.

Abstract: A network switch system that includes a plurality of first-level switches operating in a slave mode, the first-level switches providing a plurality of local ports for receiving and sending network packets, and a plurality of second-level switches operating in one of brain mode or master mode, wherein, the first-level switches includes a plurality of upward ports connecting to the second-level switches, each of the first-level switches and the second-level switches having a forwarding database, wherein the first-level switches sends the refresh packets to the second-level switches for synchronizing the forwarding databases of the second-level switches, wherein the second-level switches providing packet communications among the first-level switches, and wherein a second-level switch operating in the brain mode providing refresh packets to the first-level switches for synchronizing the forwarding databases of the first-level switches.