Patents by Inventor Hung Liao

Hung Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171199
    Abstract: A wireless device control circuit with modularized internal circuit architecture and associated wireless communications device are provided. The wireless device control circuit may include a first digital processing circuit and a second digital processing circuit. The first digital processing circuit is arranged to perform first digital processing corresponding to a first predetermined radio frequency band for the wireless communications device, the first digital processing including common processing and a first additional processing. The second digital processing circuit is arranged to perform second digital processing corresponding to a second predetermined radio frequency band for the wireless communications device, the second digital processing including the common processing and a second additional processing.
    Type: Application
    Filed: November 9, 2023
    Publication date: May 23, 2024
    Applicant: MEDIATEK INC.
    Inventors: Ping-Hung Kao, Yung-Ting Tsai, Ming-Fu Sun, Hsiao-Kai Liao
  • Publication number: 20240170053
    Abstract: A latch formed from a memory cell includes a clock input terminal configured to receive a clock signal, complementary first and second data terminals, and a latch circuit. The latch circuit has first and second inverters. The first inverter has an input terminal coupled to the first data terminal, and the second inverter has an input terminal coupled to the second data terminal. A first pass gate transistor is coupled between an output terminal of the second inverter and the first data terminal. A second pass gate transistor is coupled between an output terminal of the first inverter and the second data terminal. The first and second pass gate transistors each have a gate terminal coupled to the clock input terminal. The input terminal of the first inverter is not directly connected to the output terminal of the second inverter, and the input terminal of the second inverter is not directly connected to the output terminal of the first inverter.
    Type: Application
    Filed: January 26, 2024
    Publication date: May 23, 2024
    Inventors: Hua-Hsin Yu, Cheng Hung Lee, Hung-Jen Liao, Hau-Tai Shieh
  • Patent number: 11988972
    Abstract: A method is described. The method includes obtaining a relationship between a thickness of a contamination layer formed on a mask and an amount of compensation energy to remove the contamination layer, obtaining a first thickness of a first contamination layer formed on the mask from a thickness measuring device, and applying first compensation energy calculated from the relationship to a light directed to the mask.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Hsun Lin, Yu-Hsiang Ho, Jhun Hua Chen, Chi-Hung Liao, Teng Kuei Chuang
  • Publication number: 20240160106
    Abstract: A lithography method in semiconductor fabrication is provided. The method includes generating a plurality of first drops of a target material through a first nozzle group selected from a plurality of nozzles to form a first elongated droplet; generating a first laser pulse to convert the first elongated droplet into plasma that generates a first extreme ultraviolet (EUV) radiation; reflecting the first EUV radiation by a collector mirror having an optical axis; generating a plurality of second drops of the target material through a second nozzle group selected from the plurality of nozzles to form a second elongated droplet, the second elongated droplet being oblique with the optical axis of the collector mirror at a different angle than the first elongated droplet.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung LIAO, Yueh-Lin YANG
  • Publication number: 20240164114
    Abstract: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.
    Type: Application
    Filed: November 29, 2023
    Publication date: May 16, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Hung-Wei Liu, Vassil N. Antonov, Ashonita A. Chavan, Darwin Franseda Fan, Jeffery B. Hull, Anish A. Khandekar, Masihhur R. Laskar, Albert Liao, Xue-Feng Lin, Manuj Nahar, Irina V. Vasilyeva
  • Publication number: 20240156440
    Abstract: A method of reconstructing transcranial images using a dual-mode ultrasonic phased array includes steps of: controlling channels to emit energy toward an intracranial target point of a patient; respectively generating backscattered radiofrequency (RF) data by using the channels to receive backscattered energy reflected from the intracranial target; and reconstructing an acoustic distribution image based on those backscattered RF data in real-time. Compared with Pre-Treatment Ray Tracing Method, the present invention can display intracranial pressure distribution in real-time; compared with MR Thermometry, the present invention can be applied to low-energy applications without temperature change; and compared with Passive Cavitation Imaging, the present invention can stably present acoustic distribution images without relying on microbubbles.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: HAO-LI LIU, HSIANG-CHING LIN, ZHEN-YUAN LIAO, HSIANG-YANG MA, CHIH-HUNG TSAI, CHUN-HAO CHEN
  • Patent number: 11980920
    Abstract: Embodiments of the present disclosure relate to apparatus and methods for cleaning an exhaust path of a semiconductor process tool. One embodiment provides an exhaust pipe section and a pipe cleaning assembly connected between a semiconductor process tool and a factory exhaust. The pipe cleaning assembly includes a residue remover disposed in the exhaust pipe section. The residue remover is operable to move in the exhaust pipe section to dislodge accumulated materials from an inner surface of the exhaust pipe section.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei Chang Cheng, Cheng-Kuang Chen, Chi-Hung Liao
  • Patent number: 11982789
    Abstract: An optical lens assembly including a first lens element, a second lens element and a third lens element is provided. A periphery region of a light incident surface of the first lens element is concave. The second lens element has positive refracting power, and an optical axis region of a light incident surface of the second lens element is concave. A periphery region of a light exit surface of the third lens element is concave, and an optical axis region of a light incident surface of the third lens element is convex. The lens elements of the optical lens assembly only include the first lens element to the third lens element, and a thickness of the first lens element along an optical axis is greater than or equal to a sum of two air gaps from the first lens element to the third lens element along the optical axis.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: May 14, 2024
    Assignee: GENIUS ELECTRONIC OPTICAL (XIAMEN) CO., LTD.
    Inventors: Jiali Lian, Hung-Chien Hsieh, Huabin Liao, Lanlan Zhang
  • Publication number: 20240151333
    Abstract: A connecting structure includes a vapor chamber, a heat pipe and a working fluid. The vapor chamber includes a half shell seat, a half shell cover and a first wick structure. The half shell cover is sealed with the half shell seat and a chamber is defined therebetween. The half shell cover has a through hole and an annular wall. The first wick structure is laid on an inner surface of the half shell cover and extended into the annular wall. The heat pipe includes a tube body and a second wick structure. The tube body has an opening and a flange. The heat pipe is upright connected to an outer periphery of the annular wall by the opening. The flange is closely attached to an outer surface of the half shell cover. The second wick structure contacts the first wick structure. The working fluid is disposed in the chamber.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Pang-Hung LIAO, Chih-Wei CHEN
  • Publication number: 20240155810
    Abstract: An evaporating concave-convex platform structure of a vapor chamber and a manufacturing method thereof, the structure include a lower plate and an upper plate. The lower plate includes a main plate member and a concave-convex member. The main plate member has a chamber portion dented from one surface thereof and a frame edge surrounding a periphery of the chamber portion. The upper plate is stacked on the lower plate facing a dented surface of the chamber portion. The concave-convex member has a concave-convex surface disposed protrusively from the chamber portion of the lower plate or disposed concavely toward the chamber portion. A connecting portion is disposed to surrounds a periphery of the concave-convex surface. The connecting portion is stacked on the main plate member through the concave-convex surface. The connecting portion is welded to the main plate member.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Pang-Hung LIAO, Chih-Wei CHEN
  • Publication number: 20240152187
    Abstract: A foldable electronic device including a first body, a second body, a hinge module, and a cover is provided. The hinge module is connected to the first body and the second body, such that the first body and the second body are rotated relatively to be folded or unfolded via the hinge module. The hinge module has a protruding rod eccentric to a rotation center of the hinge module. The cover is pivoted to the second body and located on a moving path of the protruding rod. The hinge module drives the cover to be rotated relative to the second body via the protruding rod.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 9, 2024
    Applicant: Acer Incorporated
    Inventors: Chun-Hung Wen, Chun-Hsien Chen, Hui-Ping Sun, Wen-Neng Liao, Yu-Ming Lin, Kuan-Lin Chen
  • Patent number: 11978511
    Abstract: A phase-change memory (PCM) cell is provided to include a first electrode, a second electrode, and a phase-change feature disposed between the first electrode and the second electrode. The phase-change feature is configured to change its data state based on a write operation performed on the PCM cell. The write operation includes a reset stage and a set stage. In the reset stage, a plurality of reset current pulses are applied to the PCM cell, and the reset current pulses have increasing current amplitudes. In the set stage, a plurality of set current pulses are applied to the PCM cell, and the set current pulses exhibit an increasing trend in current amplitude. The current amplitudes of the set current pulses are smaller than those of the reset current pulses.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Huei Lee, Chun-Wei Chang, Jian-Hong Lin, Wen-Hsien Kuo, Pei-Chun Liao, Chih-Hung Nien
  • Publication number: 20240145867
    Abstract: A separator for a lithium battery and a method for manufacturing the same are provided. The separator includes a substrate layer and a coating layer. The substrate layer is a polyolefin porous film and has a substrate thickness ranging from 10 to 30 micrometers. The coating layer is coated on the substrate layer, and has a coating layer thickness ranging from 1 to 5 micrometers. The coating layer includes a heat-resistant resin material and a plurality of inorganic ceramic particles glued in the heat-resistant resin material. The heat-resistant resin material has a melting point (Tm) or a glass transition temperature (Tg) of not less than 150° C. An average particle size of the inorganic ceramic particles is 10% to 40% of the coating layer thickness of the coating layer. The inorganic ceramic particles are stacked in the coating layer with a height of at least three layers.
    Type: Application
    Filed: January 17, 2023
    Publication date: May 2, 2024
    Inventors: TE-CHAO LIAO, CHUN-CHE TSAO, CHENG-HUNG CHEN, LI-TING WANG
  • Patent number: 11973164
    Abstract: A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 30, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Che-Hung Lin, Chien-Chih Liao, Chi-Shiang Hsu, De-Shan Kuo, Chao-Hsing Chen
  • Publication number: 20240136383
    Abstract: A semiconductor device includes a single-layered dielectric layer, a conductive line, a conductive via and a conductive pad. The conductive line and the conductive via are disposed in the single-layered dielectric layer. The conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
  • Publication number: 20240136423
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 25, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20240134293
    Abstract: A semiconductor processing method includes: selecting a target state of a reticle based on a given data set, wherein the given data set comprises temperature profiles of the reticle correlated to a target overlay performance, and the target state is a state in which a deformation of the reticle is substantially unchanged; regulating the reticle to reach the target state; and performing an exposure process on a target workpiece by using the reticle.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yueh-Lin Yang, Chi-Hung Liao
  • Patent number: 11966107
    Abstract: An anti-peep display device includes a display module and an anti-peep module disposed on the display module. The anti-peep module includes the following features. The first light incident surface faces the display surface, the second and third light incident surfaces are located on opposite sides of the first light incident surface, the first condensing portion is disposed corresponding to the second light incident surface and the first light source, the second condensing portion is disposed corresponding to the third light incident surface and the second light source, the first and second condensing portions convert beams of the first and second light sources into anti-peep beams with a beam angle less than 10 degrees, and the optical microstructures reflect the anti-peep beams and exit the anti-peep beams from the light guide plate. The present invention also provides an anti-peep method applicable to the anti-peep display device.
    Type: Grant
    Filed: June 14, 2023
    Date of Patent: April 23, 2024
    Assignee: CHAMP VISION DISPLAY INC.
    Inventors: Chung-Hao Wu, Hsin-Hung Lee, Chin-Ku Liu, Chun-Chien Liao, Wei-Jhe Chien
  • Publication number: 20240128353
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Patent number: 11958996
    Abstract: A protection tape includes a base film, an antistatic layer and an adhesive layer. The antistatic layer is located on the base film. The surface impedance of the antistatic layer is less than 1E+9?, and the antistatic layer includes a first resin and conductive materials dispersed in the first resin. The conductive materials include at least one of metal ions and carbon. The adhesive layer is located on a corona treated surface of the base film. The protection tape provided by the present disclosure has the advantage of having resistant to corona treatment.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: April 16, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Chun-Che Tsao, Cheng-Hung Chen