Patents by Inventor Hung Liu

Hung Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240176603
    Abstract: Aspects of the present disclosure are directed to translating application calls for on-device machine learning execution. A translation layer supports on-device machine learning execution by translating JavaScript software application call data to achieve interoperability with on-device machine learning models. For example, JavaScript software applications interact with data, such as images, audio, video, and/or text, in a format or data type that is compatible with the application. On the other hand, machine learning models interact with data in a form conducive to mathematical operations, such as a data structure representation (e.g., tensor representation). Implementations translate data types and/or data files to provide compatible data to each of a native JavaScript software application and on-device machine learning models.
    Type: Application
    Filed: November 29, 2022
    Publication date: May 30, 2024
    Inventors: Roman Georg RAEDLE, Christopher Robert Harper KLAIBER, Yinglao LIU, Shiyong FANG, Pranav DESHPANDE, Hung Shek NGAN, Anoop Kumar SINHA
  • Publication number: 20240178102
    Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.
    Type: Application
    Filed: April 21, 2023
    Publication date: May 30, 2024
    Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
  • Publication number: 20240178091
    Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 30, 2024
    Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
  • Publication number: 20240177503
    Abstract: The present invention discloses a port district sea line multiple vessel monitoring system and operating method thereof. Specifically, the port district sea line multiple vessel monitoring system comprises a processing module, a storage module, a camera and a floating object information receiving module. The port district sea line multiple vessel monitoring system may automatically recognize image classification of water surface object, therefore to determine operation of patrol mode, monitor mode or auxiliary recognizing mode for satisfying the needs of monitoring of port district sea line.
    Type: Application
    Filed: November 25, 2023
    Publication date: May 30, 2024
    Inventors: YU-TING PENG, YAN-SHENG SONG, CHIA-YU WU, CHIEN-HUNG LIU
  • Publication number: 20240175649
    Abstract: A heat exchange tube is used to solve the problem of insufficient heat exchange efficiency of the conventional heat exchange tube. The heat exchange tube includes a tube, a first porous layer, and a second porous layer. The tube includes an inner wall. The first porous layer includes a plurality of holes. The first porous layer is disposed on the inner wall of the tube. The second porous layer includes a plurality of holes. The second porous layer is disposed on an inner surface of the first porous layer. An average diameter of the plurality of holes of the second porous layer is greater than an average diameter of the plurality of holes of the first porous layer. A method for manufacturing a heat exchange tube is also disclosed.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Inventors: Yu-Lin CHUNG, Chia-Hung HUANG, Jiun-Cherng LIU, Chi-Huei CHEN
  • Publication number: 20240171435
    Abstract: Techniques pertaining to optimization of distributed-tone resource unit (RU) pilot tone designs in wireless communications are described. An apparatus (e.g., station (STA)) generates a distributed-tone RU (dRU) with a respective position of each of one or more pilot tones shifted with a respective position of each of one or more other pilot tones kept unchanged. The apparatus then performs a wireless communication in a 20 MHz or 40 MHz bandwidth with the dRU.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 23, 2024
    Inventors: Shengquan Hu, Ching-Chia Cheng, Hung-Tao Hsieh, Jianhan Liu, Thomas Edward Pare, JR.
  • Publication number: 20240170473
    Abstract: A chip package structure including a heat dissipation base, a first redistribution layer, a second redistribution layer, at least one chip, at least one metal stack, a plurality of conductive structures, and an encapsulant is provided. The second redistribution layer is disposed on the heat dissipation base and thermally coupled to the heat dissipation base. The chip, the metal stack, and the conductive structures are disposed between the second redistribution layer and the first redistribution layer. An active surface of the chip is electrically connected to the first redistribution layer and an inactive surface of the chip is thermally coupled to the second redistribution layer via the metal stack. The first redistribution layer is electrically connected to the second redistribution layer via the conductive structures. The encapsulant is filled between the second redistribution layer and the first redistribution layer. A manufacturing method of a chip package structure is also provided.
    Type: Application
    Filed: July 6, 2023
    Publication date: May 23, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Hao-Che Kao, Wen-Hung Liu, Yu-Min Lin, Ching-Kuan Lee
  • Patent number: 11987566
    Abstract: The present invention provides a novel compound for effectively preventing nerve damage and protecting nerves, and a preparation method thereof. Besides, the present invention also provides a pharmaceutical composition comprising the novel compound, and a use of the novel compound for preventing nerve damage and protecting nerves.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: May 21, 2024
    Assignee: GENHEALTH PHARMA CO., LTD.
    Inventors: Lain-Tze Lee, Hui-Ping Tsai, Yi-Wen Lin, Shu-Fen Huang, Shih-Hung Liu, Chin-Wei Liu, Pi-Tsan Huang, Mei-Hui Chen
  • Publication number: 20240162903
    Abstract: An electronic switch device and an electronic switch system are provided, wherein the electronic switch system includes: an electronic switch device, which includes: a sensing module, which includes: a pressure sensing module for providing a pressure sensing signal; and a touch control sensing module disposed on the pressure sensing module for providing a touch control sensing signal; and a comparator circuit coupled to the sensing module for receiving the pressure sensing signal.
    Type: Application
    Filed: March 30, 2023
    Publication date: May 16, 2024
    Inventors: Chia-Tsun Huang, Keng-Kuei Liang, chih-hung Liu, Yi-Feng Chen
  • Publication number: 20240156440
    Abstract: A method of reconstructing transcranial images using a dual-mode ultrasonic phased array includes steps of: controlling channels to emit energy toward an intracranial target point of a patient; respectively generating backscattered radiofrequency (RF) data by using the channels to receive backscattered energy reflected from the intracranial target; and reconstructing an acoustic distribution image based on those backscattered RF data in real-time. Compared with Pre-Treatment Ray Tracing Method, the present invention can display intracranial pressure distribution in real-time; compared with MR Thermometry, the present invention can be applied to low-energy applications without temperature change; and compared with Passive Cavitation Imaging, the present invention can stably present acoustic distribution images without relying on microbubbles.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: HAO-LI LIU, HSIANG-CHING LIN, ZHEN-YUAN LIAO, HSIANG-YANG MA, CHIH-HUNG TSAI, CHUN-HAO CHEN
  • Publication number: 20240162171
    Abstract: A device die including a first semiconductor die, a second semiconductor die, an anti-arcing layer and a first insulating encapsulant is provided. The second semiconductor die is stacked over and electrically connected to the first semiconductor die. The anti-arcing layer is in contact with the second semiconductor die. The first insulating encapsulant is disposed over the first semiconductor die and laterally encapsulates the second semiconductor die. Furthermore, methods for fabricating device dies are provided.
    Type: Application
    Filed: January 21, 2024
    Publication date: May 16, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chen, Tzuan-Horng Liu, Chia-Hung Liu, Hao-Yi Tsai
  • Publication number: 20240163978
    Abstract: An electric heating material processing device includes a material transporting module, a material feeding controller, a material discharging controller, a gas vent, and an electric heating thermal desorption device. The material transporting module has a material inlet and a material outlet. The material feeding controller is connected to the material inlet, and is configured to control a feeding quantity and a feeding speed of the materials. The material discharging controller is connected to the material outlet, and is configured to control a discharging quantity and a discharging speed of the materials. The gas vent is disposed on an end of the material transporting module. The electric heating thermal desorption device is disposed on an outer surface of the material transporting module, and is configured to perform a thermal desorption process on the materials. The electric heating thermal desorption device includes an electric heating acceptor and plural electric heaters.
    Type: Application
    Filed: February 24, 2023
    Publication date: May 16, 2024
    Inventors: Huang-Long LIN, Yuan-Hung LIU, Yu-Chi CHANG
  • Patent number: 11983475
    Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu, Lee-Chung Lu, Yen-Hung Lin, Li-Chun Tien, Yi-Kan Cheng
  • Patent number: 11984516
    Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: May 14, 2024
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventors: Fu-Chou Liu, Jui-Hung Hsu, Yu-Chiang Peng, Chien-Chen Lee, Ya-Han Chang, Li-Chun Hung
  • Patent number: 11984419
    Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Hung Chen, Yu-Nu Hsu, Chun-Chen Liu, Heng-Chi Huang, Chien-Chen Li, Shih-Yen Chen, Cheng-Nan Hsieh, Kuo-Chio Liu, Chen-Shien Chen, Chin-Yu Ku, Te-Hsun Pang, Yuan-Feng Wu, Sen-Chi Chiang
  • Publication number: 20240153887
    Abstract: A semiconductor package structure includes a base having a first surface and a second surface opposite thereto, wherein the base comprises a wiring structure, a first electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, a second electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, wherein the first electronic component and the second electronic component are separated by a molding material, a first hole and a second hole formed on the second surface of the base, and a frame disposed over the first surface of the base, wherein the frame surrounds the first electronic component and the second electronic component.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Inventors: Tzu-Hung LIN, Chia-Cheng CHANG, I-Hsuan PENG, Nai-Wei LIU
  • Patent number: 11978740
    Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Harry-Hak-Lay Chuang, Kuo-Ching Huang, Wei-Cheng Wu, Hsin Fu Lin, Henry Wang, Chien Hung Liu, Tsung-Hao Yeh, Hsien Jung Chen
  • Publication number: 20240143791
    Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a search circuitry and a substitution check circuitry. The key generation circuitry is arranged operably to convert a first value of one byte corresponding to a plaintext, an intermediate encryption result, or a round key into a second value of a K-bit according to an 8-to-K lookup table, where K is an integer ranging from 10 to 15 and the second value comprises (K minus 8) bits of a Hamming parity. The substitution check circuitry is arranged operably to employ check formulae corresponding to the 8-to-K lookup table to determine whether an error is occurred during a conversion of the first value of the one byte into the second value of the K-bit, and output an error signal when finding the error, where a total amount of the formulae is K minus 8.
    Type: Application
    Filed: May 30, 2023
    Publication date: May 2, 2024
    Applicant: Silicon Motion, Inc.
    Inventors: Wun-Jhe WU, Po-Hung CHEN, Chiao-Wen CHENG, Jiun-Hung YU, Chih-Wei LIU
  • Publication number: 20240145691
    Abstract: The present invention is related to a novel positive electrode active material for lithium-ion battery. The positive electrode active material is expressed by the following formula: Li1.2NixMn0.8-x-yZnyO2, wherein x and y satisfy 0<x?0.8 and 0<y?0.1. In addition, the present invention provides a method of manufacturing the positive electrode active material. The present invention further provides a lithium-ion battery which uses said positive electrode active material.
    Type: Application
    Filed: March 14, 2023
    Publication date: May 2, 2024
    Inventors: CHUAN-PU LIU, YIN-WEI CHENG, SHIH-AN WANG, BO-LIANG PENG, CHUN-HUNG CHEN, JUN-HAN HUANG, YI-CHANG LI
  • Publication number: 20240142664
    Abstract: Two types of blue light blocking contact lenses are provided and are formed by curing different compositions. The first composition includes a blue light blocking component formed by mixing or reacting a first hydrophilic monomer and a yellow dye, a first colored dye component formed by mixing or reacting a second hydrophilic monomer and a first colored dye, at least one third hydrophilic monomer, a crosslinker, and an initiator. The first colored dye includes a green dye, a cyan dye, a blue dye, an orange dye, a red dye, a black dye, or combinations thereof. The second composition includes a blue light blocking component, at least one hydrophilic monomer, a crosslinker, and an initiator. The blue light blocking component is formed by mixing or reacting glycerol monomethacrylate and a yellow dye. Further, methods for preparing the above contact lenses are provided.
    Type: Application
    Filed: February 12, 2023
    Publication date: May 2, 2024
    Inventors: Han-Yi CHANG, Chun-Han CHEN, Tsung-Kao HSU, Wei-che WANG, Yu-Hung LIN, Wan-Ying GAO, Li-Hao LIU