Abstract: An electronic device is provided. The electronic device includes a first substrate, an insulating layer, a first conductive layer and a second conductive layer. The insulating layer is overlapped with the first substrate. The second conductive layer contacts with the first conductive layer. The first conductive layer and the second conductive layer are disposed between the first substrate and the insulating layer. The second conductive layer is disposed between the first conductive layer and the insulating layer. Moreover, a thermal expansion coefficient of the second conductive layer is between a thermal expansion coefficient of the first conductive layer and a thermal expansion coefficient of the insulating layer.

Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region, a first gate pattern extending along a first direction from the first active region to the second active region, a second gate pattern extending along the first direction from the first active region to the second active region, a first magnetic tunneling junction (MTJ) between the first gate pattern and the second pattern and within the word line connecting region, and a second MTJ between the first gate pattern and the second gate pattern in the first active region. Preferably, top surfaces of the first MTJ and the second MTJ are coplanar.

Abstract: A magnetoresistive random access memory, including a substrate, a conductive plug in the substrate, wherein the conductive plug has a notched portion on one side of the upper edge of the conductive plug, and a magnetic memory cell with a bottom electrode electrically connecting with the conductive plug, a magnetic tunnel junction on the bottom electrode and a top electrode on the magnetic tunnel junction, wherein the bottom surface of the magnetic memory cell and the top surface of the conductive plug completely align and overlap each other.

Abstract: An uninterruptible power apparatus is coupled between a power grid and a load. The uninterruptible power apparatus includes a bypass path, a power conversion module, and a control module. The bypass path is coupled to the power grid through a grid terminal, and coupled to the load through a load terminal. The control module turns off a first thyristor and a second thyristor by injecting a second voltage into the load terminal during a forced commutation period. The control module calculates a magnetic flux offset amount based on an error amount between the second voltage and a voltage command, and provides a compensation command in response to the magnetic flux offset amount. The control module controls the DC/AC conversion circuit to provide a third voltage to the load terminal based on the compensation command and the voltage command.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.

Abstract: An antireflection structure is provided. The antireflection structure includes a substrate layer having a substrate refractive index; a first inorganic layer disposed on the substrate layer and having a first refractive index different from the substrate refractive index, where a thickness of the first inorganic layer is in a range of 1 to 40 nm; and a second inorganic layer disposed on the first inorganic layer and having a second refractive index different from the first refractive index.

Abstract: An antireflection structure is provided. The antireflection structure includes a substrate layer having a substrate refractive index; a first inorganic layer disposed on the substrate layer and having a first refractive index different from the substrate refractive index, where a thickness of the first inorganic layer is in a range of 1 to 40 nm; and a second inorganic layer disposed on the first inorganic layer and having a second refractive index different from the first refractive index.

Abstract: A reflective film is provided. The reflective film includes a substrate; a middle layer disposed on the substrate and mainly having a crystallized transition metal; and a metal layer disposed on the middle layer.

Abstract: A method for utilizing software to implement multiple power-up graphics in a single computer platform. The computer platform receives a power-up graphic mode and determined whether the power-up graphic mode is multiple graphic mode or general graphic mode. The computer platform then displays corresponding power-up graphics according to the power-up mode during power-up, implementing multiple power-up graphics to match IA functions or satisfy user preference.

Abstract: A selectable booting operation method by Basic Input Output System (BIOS) with multi-partitioned disk is provided in the present invention. The INT 19H interrupt service program in the original BIOS are slightly modified, so that when power is on the multi-partition boot selection flag being setup serves to select from the operating systems stored in different partitions of the disk, and booting time of the system is reduced accordingly. Therefore, with the present invention, users are free to choose one of the different operating systems on a single computer platform under different booting conditions upon preference without additional installation of the Boot Management Utility (BMU). Accordingly, the present invention eliminates the synchronization process that is originally performed on BMU if the operating system is being reinstalled or repeatedly installed, so as to avoid inconvenience and annoyance thereby.

Abstract: A selectable booting operation method by Basic Input Output System (BIOS) with multi-partitioned disk is provided in the present invention. The INT 19H interrupt service program in the original BIOS are slightly modified, so that when power is on the multi-partition boot selection flag being setup serves to select from the operating systems stored in different partitions of the disk, and booting time of the system is reduced accordingly. Therefore, with the present invention, users are free to choose one of the different operating systems on a single computer platform under different booting conditions upon preference without additional installation of the Boot Management Utility (BMU). Accordingly, the present invention eliminates the synchronization process that is originally performed on BMU if the operating system is being reinstalled or repeatedly installed, so as to avoid inconvenience and annoyance thereby.

Abstract: A method for utilizing software to implement multiple power-up graphics in a single computer platform. The computer platform receives a power-up graphic mode and determined whether the power-up graphic mode is multiple graphic mode or general graphic mode. The computer platform then displays corresponding power-up graphics according to the power-up mode during power-up, implementing multiple power-up graphics to match IA functions or satisfy user preference.

Abstract: A circuit for protecting a laser indicator is disclosed in which a current amplifying circuit composed of two transistors drives a laser light emitting diode (LED) to generate a laser light. A base of one of the two transistors connects with a protective resistor and a variable resistor. The variable resistor is used to control the magnitude of a base current of the transistor and the protective resistor is used to prevent an overrating current. A diode is further coupled to a positive power input terminal of the current amplifying circuit to prevent the circuit for protecting a laser indicator from being damaged due to being reversely connected the polarities of the power source. Through a design of such a circuit, a stable laser light-spot is achieved and the components in the circuit will not be damaged.