Patents by Inventor Hung Q. Doan

Hung Q. Doan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10469775
    Abstract: Image sensors may include image sensor pixels that support high dynamic range (HDR) global shutter function. An image sensor pixel may include a photodiode that is coupled to multiple storage gate nodes via respective charge transfer gates. Each of the multiple storage gate nodes may be configured to store charge corresponding to different exposure periods. The storage gate nodes may be coupled in parallel or in series with the photodiode. Charge from the different exposure times can then be merged to produce a high dynamic range image signal.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: November 5, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: John P. McCarten, Hung Q. Doan, Robert Kaser
  • Publication number: 20180288343
    Abstract: Image sensors may include image sensor pixels that support high dynamic range (HDR) global shutter function. An image sensor pixel may include a photodiode that is coupled to multiple storage gate nodes via respective charge transfer gates. Each of the multiple storage gate nodes may be configured to store charge corresponding to different exposure periods. The storage gate nodes may be coupled in parallel or in series with the photodiode. Charge from the different exposure times can then be merged to produce a high dynamic range image signal.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 4, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: John P. McCARTEN, Hung Q. DOAN, Robert KASER
  • Patent number: 9431456
    Abstract: An image sensor is fabricated by forming transfer gates over a substrate layer. A transfer gate is disposed between a respective shared charge-to-voltage conversion region and a photodetector associated with the shared charge-to-voltage conversion region. The transfer gates of each shared charge-to-voltage conversion region are spaced apart to form a conversion region gap. A masking conformal dielectric layer is deposited over the image sensor, covers the transfer gates, fills each conversion region gap, and is etched to form sidewall spacers along an outside edge of each transfer gate with a portion remaining in each conversion region gap and disposed over the substrate layer in each conversion region gap. Source/drain regions are implanted in the substrate layer where an implant region is formed in the transfer gates. The masking conformal dielectric layer in each conversion gap masks the source/drain implant Each charge-to-voltage conversion region is substantially devoid of the implant region.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: August 30, 2016
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hung Q. Doan, Eric G. Stevens
  • Publication number: 20150179701
    Abstract: An image sensor is fabricated by forming transfer gates over a substrate layer. A transfer gate is disposed between a respective shared charge-to-voltage conversion region and a photodetector associated with the shared charge-to-voltage conversion region. The transfer gates of each shared charge-to-voltage conversion region are spaced apart to form a conversion region gap. A masking conformal dielectric layer is deposited over the image sensor, covers the transfer gates, fills each conversion region gap, and is etched to form sidewall spacers along an outside edge of each transfer gate with a portion remaining in each conversion region gap and disposed over the substrate layer in each conversion region gap. Source/drain regions are implanted in the substrate layer where an implant region is formed in the transfer gates. The masking conformal dielectric layer in each conversion gap masks the source/drain implant Each charge-to-voltage conversion region is substantially devoid of the implant region.
    Type: Application
    Filed: February 10, 2015
    Publication date: June 25, 2015
    Inventors: Hung Q. Doan, Eric G. Stevens
  • Patent number: 9000500
    Abstract: An image sensor includes an array of pixels, with at least one pixel including a photodetector formed in a substrate layer and a transfer gate disposed adjacent to the photodetector. The substrate layer further includes multiple charge-to-voltage conversion regions. A single photodetector can transfer collected charge to a single charge-to-voltage conversion region, or alternatively multiple photodetectors can transfer collected charge to a common charge-to-voltage conversion region shared by the photodetectors. An implant region formed when dopants are implanted into the substrate layer to form source/drain implant regions is disposed in only a portion of each transfer gate while each charge-to-voltage conversion region is substantially devoid of the implant region.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: April 7, 2015
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hung Q. Doan, Eric G. Stevens
  • Patent number: 8994139
    Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: March 31, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
  • Patent number: 8772891
    Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: July 8, 2014
    Assignee: Truesense Imaging, Inc.
    Inventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
  • Patent number: 8378398
    Abstract: Shallow trench isolation regions are disposed in an n-type silicon semiconductor layer laterally adjacent to a collection region of a photodetector and laterally adjacent to a charge-to-voltage conversion region. The shallow trench isolation regions each include a trench disposed in the silicon semiconductor layer and a first dielectric structure disposed along an interior bottom and sidewalls of each trench. A second dielectric structure is disposed over the pinning layer. The dielectric structures include a silicon nitride layer disposed over an oxide layer. An n-type isolation layer is disposed along only a portion of the exterior bottom of the trench and the exterior sidewall of the trench immediately adjacent to the photodetector. The n-type isolation layer is not disposed along the remaining portion of the bottom or the opposing exterior sidewall of the trench.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: February 19, 2013
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hung Q. Doan, Eric G. Stevens, Robert M. Guidash
  • Patent number: 8329499
    Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: December 11, 2012
    Assignee: Truesense Imaging, Inc.
    Inventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
  • Publication number: 20120168892
    Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.
    Type: Application
    Filed: March 8, 2012
    Publication date: July 5, 2012
    Inventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
  • Publication number: 20120083067
    Abstract: A first shallow trench isolation region is disposed in the silicon semiconductor layer laterally adjacent to a photodetector while a second shallow trench isolation region is disposed in the silicon semiconductor layer laterally adjacent to other electrical components in a pixel. The first and second shallow trench isolation regions each include a trench disposed in the silicon semiconductor layer that is filled with a dielectric material. An isolation layer having the second conductivity is disposed only along a portion of a bottom and only along a sidewall of the trench immediately adjacent to the photodetector. The isolation layer is not disposed along the other portion of the bottom and along the other sidewall of the trench adjacent the photodetector. The isolation layer is not disposed along the bottom and sidewalls of the trench adjacent to the other electrical components.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Inventors: Hung Q. Doan, Eric G. Stevens, Robert M. Guidash
  • Publication number: 20120080733
    Abstract: Shallow trench isolation regions are disposed in an n-type silicon semiconductor layer laterally adjacent to a collection region of a photodetector and laterally adjacent to a charge-to-voltage conversion region. The shallow trench isolation regions each include a trench disposed in the silicon semiconductor layer and a first dielectric structure disposed along an interior bottom and sidewalls of each trench. A second dielectric structure is disposed over the pinning layer. The dielectric structures include a silicon nitride layer disposed over an oxide layer. An n-type isolation layer is disposed along only a portion of the exterior bottom of the trench and the exterior sidewall of the trench immediately adjacent to the photodetector. The n-type isolation layer is not disposed along the remaining portion of the bottom or the opposing exterior sidewall of the trench.
    Type: Application
    Filed: December 13, 2010
    Publication date: April 5, 2012
    Inventors: Hung Q. Doan, Eric G. Stevens, Robert M. Guidash
  • Publication number: 20120080731
    Abstract: A first shallow trench isolation region is disposed in the silicon semiconductor layer laterally adjacent to a photodetector while a second shallow trench isolation region is disposed in the silicon semiconductor layer laterally adjacent to other electrical components in a pixel. The first and second shallow trench isolation regions each include a trench disposed in the silicon semiconductor layer that is filled with a dielectric material. An isolation layer having the second conductivity is disposed only along a portion of a bottom and only along a sidewall of the trench immediately adjacent to the photodetector. The isolation layer is not disposed along the other portion of the bottom and along the other sidewall of the trench adjacent the photodetector. The isolation layer is not disposed along the bottom and sidewalls of the trench adjacent to the other electrical components.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Inventors: Hung Q. Doan, Eric G. Stevens, Robert M. Guidash
  • Patent number: 8101450
    Abstract: Shallow trench isolation regions are disposed in an n-type silicon semiconductor layer laterally adjacent to a collection region of a photodetector and laterally adjacent to a charge-to-voltage conversion region. The shallow trench isolation regions each include a trench disposed in the silicon semiconductor layer and a first dielectric structure disposed along an interior bottom and sidewalls of each trench. A second dielectric structure is disposed over the pinning layer. The dielectric structures include a silicon nitride layer disposed over an oxide layer. An n-type isolation layer is disposed along only a portion of the exterior bottom of the trench and the exterior sidewall of the trench immediately adjacent to the photodetector. The n-type isolation layer is not disposed along the remaining portion of the bottom or the opposing exterior sidewall of the trench.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: January 24, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hung Q. Doan, Eric G. Stevens, Robert M. Guidash
  • Patent number: 8076746
    Abstract: A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. One or more frontside regions of a second conductivity type are formed in at least a portion of the frontside of the sensor layer. A backside region of the second conductivity type is formed in the backside of the sensor layer. A plurality of frontside photodetectors of the first conductivity type is disposed in the sensor layer. A distinct plurality of backside photodetectors of the first conductivity type separate from the plurality of frontside photodetectors are formed in the sensor layer contiguous to portions of the region of the second conductivity type. A voltage terminal is disposed on the frontside of the sensor layer. One or more connecting regions of the second conductivity type are disposed in respective portions of the sensor layer between the voltage terminal and the backside region for electrically connecting the voltage terminal to the backside region.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: December 13, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventors: John P. McCarten, Cristian A. Tivarus, Joseph R. Summa, Eric G. Stevens, Hung Q. Doan, Robert M. Guidash
  • Patent number: 8048711
    Abstract: An image sensor having an imaging area that includes a substrate layer and a plurality of pixels formed therein. Multiple pixels each include a photodetector formed in the substrate layer. Isolation layers are formed in the substrate layer by performing a series of implants of one or more dopants of a first conductivity type into the substrate layer. Each isolation layer implant is performed with a different energy than the other isolation layer implants in the series and each implant implants the one or more dopants into the entire imaging area. The photodetectors are formed in the substrate layer by performing a series of implants of one or more dopants of a second conductivity type into each pixel in the substrate layer. Each photodetector implant is performed with a different energy than the other photodetector implants in the series.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: November 1, 2011
    Assignee: Omnivision Technologies, Inc.
    Inventors: Hung Q. Doan, Eric G. Stevens
  • Patent number: 8018016
    Abstract: A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. An insulating layer is disposed over the backside. A circuit layer is formed adjacent to the frontside such that the sensor layer is positioned between the circuit layer and the insulating layer. One or more frontside regions of a second conductivity type are formed in at least a portion of the frontside of the sensor layer. A backside region of the second conductivity type is formed in the backside of the sensor layer. A plurality of frontside photodetectors of the first conductivity type is disposed in the sensor layer. A distinct plurality of backside photodetectors of the first conductivity type separate from the plurality of frontside photodetectors is formed in the sensor layer contiguous to portions of the backside region of the second conductivity type.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: September 13, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventors: John P. McCarten, Cristian A. Tivarus, Joseph R. Summa, Eric G. Stevens, Hung Q. Doan, Robert M. Guidash
  • Publication number: 20110156112
    Abstract: An image sensor includes an array of pixels, with at least one pixel including a photodetector formed in a substrate layer and a transfer gate disposed adjacent to the photodetector. The substrate layer further includes multiple charge-to-voltage conversion regions. A single photodetector can transfer collected charge to a single charge-to-voltage conversion region, or alternatively multiple photodetectors can transfer collected charge to a common charge-to-voltage conversion region shared by the photodetectors. An implant region formed when dopants are implanted into the substrate layer to form source/drain implant regions is disposed in only a portion of each transfer gate while each charge-to-voltage conversion region is substantially devoid of the implant region.
    Type: Application
    Filed: November 9, 2010
    Publication date: June 30, 2011
    Inventors: Hung Q. Doan, Eric G. Stevens
  • Publication number: 20110159635
    Abstract: An image sensor having an imaging area that includes a substrate layer and a plurality of pixels formed therein. Multiple pixels each include a photodetector formed in the substrate layer. Isolation layers are formed in the substrate layer by performing a series of implants of one or more dopants of a first conductivity type into the substrate layer. Each isolation layer implant is performed with a different energy than the other isolation layer implants in the series and each implant implants the one or more dopants into the entire imaging area. The photodetectors are formed in the substrate layer by performing a series of implants of one or more dopants of a second conductivity type into each pixel in the substrate layer. Each photodetector implant is performed with a different energy than the other photodetector implants in the series.
    Type: Application
    Filed: November 9, 2010
    Publication date: June 30, 2011
    Inventors: Hung Q. Doan, Eric G. Stevens
  • Publication number: 20100148230
    Abstract: Trenches are formed in a substrate or layer and a solid source doped with one or more dopants is deposited over the image sensor such that the solid source fills the one or more trenches and is disposed on the surface of the substrate. The surface of the image sensor is then planarized so that the solid source remains only in the trenches. A thermal drive operation is performed to cause at least a portion of the one or more dopants in the solid source to diffuse into the portions of the substrate or layer that are immediately adjacent to and surround the sidewall and bottom surfaces of the trenches. The diffused dopant or dopants form passivation regions that passivate the interface between the substrate or layer and the sidewall and bottom surfaces of the trenches.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 17, 2010
    Inventors: Eric G. Stevens, Hung Q. Doan