Abstract: Disclosed herein are related to a memory system including unit storage circuits. In one aspect, each of the unit storage circuits abuts an adjacent one of the unit storage circuits. In one aspect, each of the unit storage circuits includes a first group of memory cells, a second group of memory cells, a first sub-word line driver to apply a first control signal to the first group of memory cells through a first sub-word line extending along a direction, and a second sub-word line driver to apply a second control signal to the second group of memory cells through a second sub-word line extending along the direction. In one aspect, the memory system includes a common word line driver abutting one of the unit storage circuits and configured to apply a common control signal to the unit storage circuits through a word line extending along the direction.

Abstract: An interface connection method applied to a connection device. The connection device is configured to connect a host end having a first connection interface and a device end having a second connection interface. The interface connection method includes determining a voltage level of a detection pin; performing a first initialization when the detection pin is at a low level; providing an electrical power for detecting whether the electrical power is consumed or not when the detection pin is at a high level; sending a link signal when the electrical power is consumed; and performing a second initialization when the device end is detected to be in a ready state.

Abstract: An interface connection method applied to a connection device. The connection device is configured to connect a host end having a first connection interface and a device end having a second connection interface. The interface connection method includes determining a voltage level of a detection pin; performing a first initialization when the detection pin is at a low level; providing an electrical power for detecting whether the electrical power is consumed or not when the detection pin is at a high level; sending a link signal when the electrical power is consumed; and performing a second initialization when the device end is detected to be in a ready state.

Abstract: A data management circuit with network functions and a network-based data management method are provided. The network-based data management method is employed to manage a storage device coupled to a computer that includes a processor. The method includes steps of: receiving a network packet through a network; sending the network packet to the processor or accessing the storage device, according to a network header of the network packet; and requesting the processor to access the storage device according to a remaining capacity of the storage device and/or a content of the network packet.

Abstract: A data management circuit with network functions and a network-based data management method are provided. The network-based data management method is employed to manage a storage device coupled to a computer that includes a processor. The method includes steps of: receiving a network packet through a network; sending the network packet to the processor or accessing the storage device, according to a network header of the network packet; and requesting the processor to access the storage device according to a remaining capacity of the storage device and/or a content of the network packet.

Abstract: A data transmission circuit applied to a universal serial bus (USB) system includes a memory, a direct memory access (DMA) engine and a USB controller. The memory is arranged for receiving and storing external data. The DMA engine is coupled to the memory, and arranged for controlling data retrieved from the memory. The USB controller is coupled to the DMA engine, and arranged for receiving data from the DMA engine and for transmitting the received data to a host. When the memory the stored data volume reaches a first threshold, the DMA engine starts continuously fetching data from the memory and transmitting it to the USB controller, until the data volume fetched by the DMA engine reaches a second threshold, or there is no data left in the memory. The second threshold is greater than the first threshold.

Abstract: A data transmission circuit applied to a universal serial bus (USB) system includes a memory, a direct memory access (DMA) engine and a USB controller. The memory is arranged for receiving and storing external data. The DMA engine is coupled to the memory, and arranged for controlling data retrieved from the memory. The USB controller is coupled to the DMA engine, and arranged for receiving data from the DMA engine and for transmitting the received data to a host. When the memory the stored data volume reaches a first threshold, the DMA engine starts continuously fetching data from the memory and transmitting it to the USB controller, until the data volume fetched by the DMA engine reaches a second threshold, or there is no data left in the memory. The second threshold is greater than the first threshold.

Abstract: A heat exchanger having replaceable heat exchange surfaces comprises a plurality of tubes formed into a bundle wherein the tubes are arranged linearly side by side. The heat exchanger is provided with a header and reverse header at either end of the tube bundle for directing the flow of fluid therethrough. A heat exchange structure is positionable about the tube bundle in thermal contact therewith. The heat exchange structure has a surface matrix from which extend a plurality of fins for receiving heat conducted from the tube bundle. The heat exchange structure may be conveniently formed into a U-shaped sleeve which may be slid over the tubes of the tube bundle and affixed in place by means of a thermal conductive cement. The tubes may be shaped to provide a streamlined flow of a cooling fluid about the fins thereby increasing the efficiency of heat transfer to the cooling fluid.