Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

Abstract: A rotatable electroplating barrel for electroplating articles, the electroplating barrel having a proximal end with a centrally formed aperture and a distal end with at least one helical rib extending circumferentially along a longitudinal axis and between the proximal end and the distal end. The at least one helical rib, proximal end, and distal end of the electroplating barrel are formed integrally as a unitary piece and have a contiguous perforated outer wall configured to couple directly to the proximal and distal ends, extending therearound to enclose the at least one helical rib.

Abstract: A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.

Abstract: A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers interposed within a dielectric laminate. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.

Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is wholly enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

Abstract: An electrical device for soldering to a circuit board with a solder includes a capacitor, a lead frame including a solder dam, and a solder joint electrically coupling the capacitor to the lead frame. The solder dam includes one of a physical barrier to flow or an area of reduced wettability to the solder. The solder dam is between the solder joint and the circuit board. The solder dam is on one or both of a lead portion and main portion of the lead frame. In one embodiment, the first solder dam extends substantially the full width of the first lead portion. The solder dam may be a barrier and/or include a metal oxide. A method of manufacturing the device includes soldering a lead frame to a capacitor with a solder and modifying a surface on the lead frame to include a physical barrier and/or an area of reduced wettability.

Abstract: An electrical device for soldering to a circuit board with a solder includes a capacitor, a lead frame including a solder dam, and a solder joint electrically coupling the capacitor to the lead frame. The solder dam includes one of a physical barrier to flow or an area of reduced wettability to the solder. The solder dam is between the solder joint and the circuit board. The solder dam is on one or both of a lead portion and main portion of the lead frame. In one embodiment, the first solder dam extends substantially the full width of the first lead portion. The solder dam may be a barrier and/or include a metal oxide. A method of manufacturing the device includes soldering a lead frame to a capacitor with a solder and modifying a surface on the lead frame to include a physical barrier and/or an area of reduced wettability.

Abstract: A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers interposed within a dielectric laminate. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.

Abstract: A method is provided for concurrently forming terminals on a multilayer capacitor having a first plurality of interior plates with edges that are brought to and exposed upon a first surface and a second plurality of interior plates, interleaved with the first plurality of interior plates, and spaced from the first plates by a dielectric. The second plurality of interior plates has edges that are brought to and exposed upon a second surface, which is not adjacent to the first surface. A first terminal is formed by plating a layer of electrically-conductive first metal directly onto the first surface including where the edges of the first plates are exposed upon the first surface and concurrently forming a second terminal by plating a layer of electrically-conductive first metal directly onto the second surface including where the edges of the second plates are exposed upon the second surface.

Abstract: An electrical device for soldering to a circuit board with a solder includes a capacitor, a lead frame including a solder dam, and a solder joint electrically coupling the capacitor to the lead frame. The solder dam includes one of a physical barrier to flow or an area of reduced wettability to the solder. The solder dam is between the solder joint and the circuit board. The solder dam is on one or both of a lead portion and main portion of the lead frame. In one embodiment, the first solder dam extends substantially the full width of the first lead portion. The solder dam may be a barrier and/or include a metal oxide. A method of manufacturing the device includes soldering a lead frame to a capacitor with a solder and modifying a surface on the lead frame to include a physical barrier and/or an area of reduced wettability.

Abstract: An electrical device for soldering to a circuit board with a solder includes a capacitor, a lead frame including a solder dam, and a solder joint electrically coupling the capacitor to the lead frame. The solder dam includes one of a physical barrier to flow or an area of reduced wettability to the solder. The solder dam is between the solder joint and the circuit board. The solder dam is on one or both of a lead portion and main portion of the lead frame. In one embodiment, the first solder dam extends substantially the full width of the first lead portion. The solder dam may be a barrier and/or include a metal oxide. A method of manufacturing the device includes soldering a lead frame to a capacitor with a solder and modifying a surface on the lead frame to include a physical barrier and/or an area of reduced wettability.

Abstract: A multilayer ceramic capacitor and method of creating are provided. The capacitor includes a plurality of interior plates having edges that are brought to and exposed upon a first surface and also upon a portion of a second surface of the capacitor at a region where the second surface meets the first surface. An electroplated terminal is directly in contact with and mechanically and electrically connected to an edge of each of the interior plates where each plate's edge is exposed upon the first surface. The terminal wraps over the region of the capacitor from the first surface onto the portion of the second surface and is directly in contact with and mechanically and electrically connected to an edge of each of the interior plates where each plate's edge is exposed upon the second surface. The terminal does not extend to any additional surfaces which meet the first surface.

Abstract: A terminal to, most commonly, a ceramic capacitor, most commonly a multilayer ceramic capacitor (MLCC), is formed by electroless plating, also known as electroless deposition or simply as electrodeposition. In the MLCC having a multiple parallel interior plates brought to, and exposed at, at least one, first, surface, an electrically-conductive first-metal layer, preferably Cu, is electrolessly deposited upon this first surface directly in contact with, mechanically connected to, and electrically connected to, the edges of these interior plates. Lateral growth of the electrolessly-deposited first-metal is sufficient to span from exposed plate to exposed plate, electrically connecting the plates. One or more top layers, preferably one of Ni and one of Sn and Pb, are deposited, preferably by plating and more preferably by electrolytic plating, on top of the electrolessly-deposited Cu.

Abstract: A terminal to, most commonly, a ceramic capacitor, most commonly a multilayer ceramic capacitor (MLCC), is formed by electroless plating, also known as electroless deposition or simply as electrodeposition. In the MLCC having a multiple parallel interior plates brought to, and exposed at, at least one, first, surface, an electrically-conductive first-metal layer, preferably Cu, is electrolessly deposited upon this first surface directly in contact with, mechanically connected to, and electrically connected to, the edges of these interior plates. Lateral growth of the electrolessly-deposited first-metal is sufficient to span from exposed plate to exposed plate, electrically connecting the plates. One or more top layers, preferably one of Ni and one of Sn and Pb, are deposited, preferably by plating and more preferably by electrolytic plating, on top of the electrolessly-deposited Cu.

Abstract: A terminal to, most commonly, a ceramic capacitor, most commonly a multilayer ceramic capacitor (MLCC), is formed by electroless plating, also known as electroless deposition or simply as electrodeposition. In the MLCC having a multiple parallel interior plates brought to, and exposed at, at least one, first, surface, an electrically-conductive first-metal layer, preferably Cu, is electrolessly deposited upon this first surface directly in contact with, mechanically connected to, and electrically connected to, the edges of these interior plates. Lateral growth of the electrolessly-deposited first-metal is sufficient to span from exposed plate to exposed plate, electrically connecting the plates. One or more top layers, preferably one of Ni and one of Sn and Pb, are deposited, preferably by plating and more preferably by electrolytic plating, on top of the electrolessly-deposited Cu.

Abstract: A terminal to, most commonly, a ceramic capacitor, most commonly a multilayer ceramic capacitor (MLCC), is formed by electroless plating, also known as electroless deposition or simply as electrodeposition. In the MLCC having a multiple parallel interior plates brought to, and exposed at, at least one, first, surface, an electrically-conductive first-metal layer, preferably Cu, is electrolessly deposited upon this first surface directly in contact with, mechanically connected to, and electrically connected to, the edges of these interior plates. Lateral growth of the electrolessly-deposited first-metal is sufficient to span from exposed plate to exposed plate, electrically connecting the plates. One or more top layers, preferably one of Ni and one of Sn and Pb, are deposited, preferably by plating and more preferably by electrolytic plating, on top of the electrolessly-deposited Cu.