Patents by Inventor Hung-Yi Lin

Hung-Yi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11348885
    Abstract: A semiconductor package structure includes a redistribution structure and an impedance matching device. The redistribution structure includes a first surface, a second surface opposite to the first surface and a circuitless region extending from the first surface to the second surface. The impedance matching device is disposed on the redistribution structure and includes at least one impedance matching circuit aligned with the circuitless region.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: May 31, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin
  • Patent number: 11342282
    Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: May 24, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsu-Chiang Shih, Hung-Yi Lin, Meng-Wei Hsieh, Yu Sheng Chang, Hsiu-Chi Liu, Mark Gerber
  • Publication number: 20220157709
    Abstract: A semiconductor package structure and method for manufacturing the same are provided. The semiconductor package structure includes a first electronic component, a conductive pillar, a second electronic component, and a conductive through via. The conductive pillar is disposed on the first electronic component and has a first surface facing away from the first electronic component. The second electronic component is disposed on the first electronic component. The conductive through via extends through the second electronic component and has a first surface facing away from the first electronic component. The first surface of the conductive through via and the first surface of the conductive pillar are substantially coplanar.
    Type: Application
    Filed: November 18, 2020
    Publication date: May 19, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Chiang Shih, Meng-Wei Hsieh, Hung-Yi Lin, Cheng-Yuan Kung
  • Publication number: 20220148974
    Abstract: An assembly structure includes a core-computing section and a sub-computing section. The core-computing section has a first surface and a second surface opposite to the first surface. The core-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The sub-computing section has a first surface stacked on the first surface of the core-computing section and a second surface opposite to the first surface. The sub-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The assembly structure includes a first signal transmission path and a second signal transmission path. The first signal transmission path is between the at least one conductive via of the sub-computing section and the at least one conductive via of the core-computing section.
    Type: Application
    Filed: January 25, 2022
    Publication date: May 12, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hung-Yi LIN
  • Patent number: 11302267
    Abstract: A driving device and an operation method thereof are provided. The driver device includes a source driver circuit, an output switching circuit, and an equalization control circuit. Two input ends of the output switching circuit are coupled to two output ends of the source driver circuit. Two output ends of the output switching circuit are coupled to two data lines of an LED display panel. The equalization control circuit checks whether sub-pixel data of the two data lines meets a predetermined condition. A plurality of sub-pixels located on a current display line of the LED display panel are reset in a reset period. In a data scanning period after the reset period, the equalization control circuit determines whether to control the output switching circuit to perform an equalization operation on the two data lines according to the checking result.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: April 12, 2022
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chun-Hung Chen, Chia-Hsin Tung, Hsin-Hung Ou, Hung-Yi Lin
  • Patent number: 11296043
    Abstract: A semiconductor device package includes a redistribution layer (RDL), a semiconductor device, a transceiver, and a capacitor. The RDL has a first surface and a second surface opposite to the first surface. The semiconductor device is disposed on the first surface of the RDL. The transceiver is disposed on the second surface of the RDL. The capacitor is disposed on the second surface of the RDL. The semiconductor device has a first projected area and the capacitance has a second projected area. The first projected area overlaps with the second projected area.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: April 5, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Chang-Yu Lin
  • Patent number: 11233010
    Abstract: An assembly structure includes a core-computing section and a sub-computing section. The core-computing section has a first surface and a second surface opposite to the first surface. The core-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The sub-computing section has a first surface stacked on the first surface of the core-computing section and a second surface opposite to the first surface. The sub-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The assembly structure includes a first signal transmission path and a second signal transmission path. The first signal transmission path is between the at least one conductive via of the sub-computing section and the at least one conductive via of the core-computing section.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: January 25, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin
  • Patent number: 11201125
    Abstract: The present disclosure relates to a semiconductor package and a method of manufacturing the same. In some embodiments, a semiconductor package includes a substrate, at least one die, a sealing ring and an inductor. The at least one die is mounted on the substrate and includes a plurality of component structures operating with acoustic waves. The component structures are arranged on a side of the at least one die that faces the substrate. The sealing ring is disposed between the at least one die and the substrate and surrounds the component structures. The inductor is disposed in the substrate.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: December 14, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Sheng-Chi Hsieh, Hung-Yi Lin, Cheng-Yuan Kung, Pao-Nan Lee, Chien-Hua Chen
  • Patent number: 11189604
    Abstract: A device assembly structure includes a first device and at least one second device. The first device has a first active surface and a first backside surface opposite to the first active surface, and includes a plurality of first electrical contacts disposed adjacent to the first active surface. The second device has a second active surface and a second backside surface opposite to the second active surface, and includes a plurality of second electrical contacts disposed adjacent to the second active surface. The second active surface of the second device faces the first active surface of the first device, the second electrical contacts of the second device are electrically connected to the first electrical contacts of the first device, and a thickness of the second device is less than or equal to one fifth of a thickness of the first device.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: November 30, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chao-Kai Hung, Chien-Wei Chang, Ya-Chen Shih, Hung-Jung Tu, Hung-Yi Lin, Cheng-Yuan Kung
  • Publication number: 20210366407
    Abstract: A driving device and an operation method thereof are provided. The driver device includes a source driver circuit, an output switching circuit, and an equalization control circuit. Two input ends of the output switching circuit are coupled to two output ends of the source driver circuit. Two output ends of the output switching circuit are coupled to two data lines of an LED display panel. The equalization control circuit checks whether sub-pixel data of the two data lines meets a predetermined condition. A plurality of sub-pixels located on a current display line of the LED display panel are reset in a reset period. In a data scanning period after the reset period, the equalization control circuit determines whether to control the output switching circuit to perform an equalization operation on the two data lines according to the checking result.
    Type: Application
    Filed: December 16, 2020
    Publication date: November 25, 2021
    Applicant: Novatek Microelectronics Corp.
    Inventors: Chun-Hung Chen, Chia-Hsin Tung, Hsin-Hung Ou, Hung-Yi Lin
  • Publication number: 20210357039
    Abstract: An electronic device suitable for a stylus is provided. The electronic device includes a display panel, a touch module, and a processor. The display panel includes a display area. The touch module includes a touchable area. The processor is electrically connected to the display panel and the touch module. The processor defines an effective input area in the touchable area in response to the operation of the stylus, defines a mapping display area in the display area corresponding to the effective input area, and adjusts the display ratio of the mapping display area according to the input ratio of the effective input area.
    Type: Application
    Filed: May 6, 2021
    Publication date: November 18, 2021
    Inventors: Ya-Ting CHEN, Hung-Yi LIN, Chien-Chih TSENG, Chun-Tsai YEH, Wei-Tong LIN, Ming-Chieh CHEN, Yi-Ou WANG, Chao-Chieh CHENG
  • Publication number: 20210343671
    Abstract: A semiconductor package structure includes a first semiconductor die having an active surface and a passive surface opposite to the active surface, a conductive element leveled with the first semiconductor die, a first redistribution layer (RDL) being closer to the passive surface than to the active surface, a second RDL being closer to the active surface than to the passive surface, and a second semiconductor die over the second RDL and electrically coupled to the first semiconductor die through the second RDL. A first conductive path is established among the first RDL, the conductive element, the second RDL, and the active surface of the first semiconductor die.
    Type: Application
    Filed: July 13, 2021
    Publication date: November 4, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Han CHEN, Hung-Yi LIN
  • Publication number: 20210265280
    Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.
    Type: Application
    Filed: February 21, 2020
    Publication date: August 26, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Chiang SHIH, Hung-Yi LIN, Meng-Wei HSIEH, Yu Sheng CHANG, Hsiu-Chi LIU, Mark GERBER
  • Patent number: 11063013
    Abstract: A semiconductor package structure includes a first semiconductor die having an active surface and a passive surface opposite to the active surface, a conductive element leveled with the first semiconductor die, a first redistribution layer (RDL) being closer to the passive surface than to the active surface, a second RDL being closer to the active surface than to the passive surface, and a second semiconductor die over the second RDL and electrically coupled to the first semiconductor die through the second RDL. A first conductive path is established among the first RDL, the conductive element, the second RDL, and the active surface of the first semiconductor die.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: July 13, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi-Han Chen, Hung-Yi Lin
  • Publication number: 20210202392
    Abstract: An assembly structure includes a core-computing section and a sub-computing section. The core-computing section has a first surface and a second surface opposite to the first surface. The core-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The sub-computing section has a first surface stacked on the first surface of the core-computing section and a second surface opposite to the first surface. The sub-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The assembly structure includes a first signal transmission path and a second signal transmission path. The first signal transmission path is between the at least one conductive via of the sub-computing section and the at least one conductive via of the core-computing section.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hung-Yi LIN
  • Publication number: 20210202409
    Abstract: A semiconductor package structure includes a redistribution structure and an impedance matching device. The redistribution structure includes a first surface, a second surface opposite to the first surface and a circuitless region extending from the first surface to the second surface. The impedance matching device is disposed on the redistribution structure and includes at least one impedance matching circuit aligned with the circuitless region.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hung-Yi LIN
  • Patent number: 11042295
    Abstract: The disclosure discloses a control method. The control method comprises: determining that a practical operation event is triggered; determining that whether the practical operation event conforms to one of predetermined operation events to generate a determining result; defining predetermined operation event corresponding to the practical operation event as an instant operation interface, and defining an operation interface corresponding to the predetermined operation event as an instant operation interface when the determining result is yes; and displaying the instant operation interface on a touch operation display.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: June 22, 2021
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chih-Wen Hsieh, Hung-Yi Lin, Chin-Wen Lin, Hao-Ping Lin, Meng-Ju Lu
  • Patent number: 11037846
    Abstract: A semiconductor package structure includes a substrate, a die electrically connected to the substrate, and a first encapsulant. The die has a front surface and a back surface opposite to the front surface. The first encapsulant is disposed between the substrate and the front surface of the die. The first encapsulant contacts the front surface of the die and the substrate.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: June 15, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chien-Hua Chen, Hsu-Chiang Shih, Cheng-Yuan Kung, Hung-Yi Lin
  • Publication number: 20210175189
    Abstract: A semiconductor device package includes a redistribution layer (RDL), a semiconductor device, a transceiver, and a capacitor. The RDL has a first surface and a second surface opposite to the first surface. The semiconductor device is disposed on the first surface of the RDL. The transceiver is disposed on the second surface of the RDL. The capacitor is disposed on the second surface of the RDL. The semiconductor device has a first projected area and the capacitance has a second projected area. The first projected area overlaps with the second projected area.
    Type: Application
    Filed: December 4, 2019
    Publication date: June 10, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hung-Yi LIN, Chang-Yu LIN
  • Publication number: 20210167856
    Abstract: A system including optical devices is provided. The system includes a first substrate and a first device for optical communication. The first device has a first surface, a second surface opposite to the first surface, and a first side contiguous with the first surface and the second surface. Moreover, the first side is smaller than one of the first surface and the second surface in terms of area. The first device is attached at the first side thereof to the first substrate.
    Type: Application
    Filed: January 8, 2021
    Publication date: June 3, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang-Yu LIN, Cheng-Yuan KUNG, Hung-Yi LIN