Patents by Inventor Huy Minh Nguyen
Huy Minh Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11128642Abstract: Some embodiments of reassembly-free deep packet inspection (DPD on multicore hardware have been presented. In one embodiment, a set of packets of one or more files is received at a networked device from one or more connections. Each packet is scanned using one of a set of processing cores in the networked device without buffering the one or more files in the networked device. Furthermore, the set of processing cores may scan the packets substantially concurrently.Type: GrantFiled: March 4, 2020Date of Patent: September 21, 2021Assignee: SONICWALL INC.Inventors: Aleksandr Dubrovsky, John E. Gmuender, Huy Minh Nguyen, Ilya Minkin, Justin M. Brady, Boris Yanovsky
-
Patent number: 10970144Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: GrantFiled: October 29, 2019Date of Patent: April 6, 2021Assignee: SONICWALL INC.Inventors: John E. Gmuender, Iosif Harutyunov, Manish Mathur, Ilya Minkin, Huy Minh Nguyen
-
Publication number: 20200204568Abstract: Some embodiments of reassembly-free deep packet inspection (DPD on multicore hardware have been presented. In one embodiment, a set of packets of one or more files is received at a networked device from one or more connections. Each packet is scanned using one of a set of processing cores in the networked device without buffering the one or more files in the networked device. Furthermore, the set of processing cores may scan the packets substantially concurrently.Type: ApplicationFiled: March 4, 2020Publication date: June 25, 2020Inventors: Aleksandr Dubrovsky, John E. Gmuender, Huy Minh Nguyen, Ilya Minkin, Justin M. Brady, Boris Yanovsky
-
Publication number: 20200142760Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: ApplicationFiled: October 29, 2019Publication date: May 7, 2020Inventors: John E. Gmuender, Iosif Harutyunov, Manish Mathur, Ilya Minkin, Huy Minh Nguyen
-
Patent number: 10609043Abstract: Some embodiments of reassembly-free deep packet inspection (DPD on multicore hardware have been presented. In one embodiment, a set of packets of one or more files is received at a networked device from one or more connections. Each packet is scanned using one of a set of processing cores in the networked device without buffering the one or more files in the networked device. Furthermore, the set of processing cores may scan the packets substantially concurrently.Type: GrantFiled: April 30, 2019Date of Patent: March 31, 2020Assignee: SONICWALL INC.Inventors: Aleksandr Dubrovsky, John E. Gmuender, Huy Minh Nguyen, Ilya Minkin, Justin M. Brady, Boris Yanovsky
-
Patent number: 10459777Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: GrantFiled: February 20, 2018Date of Patent: October 29, 2019Assignee: SONICWALL INC.Inventors: John E. Gmuender, Iosif Harutyunov, Manish Mathur, Ilya Minkin, Huy Minh Nguyen
-
Patent number: 10419398Abstract: A method and apparatus for resource locator identifier rewrite have been presented. A security device receives from a resource host over a non-secure hypertext transfer protocol (HTTP) session a response to a request received from a client over a secure HTTP session. The response includes a uniform resource locator (URL) that is supposed to be for a resource host, but the URL does not designate a secure resource access protocol and the resource host requires the secure resource access protocol. The URL is located in the response and modified to designate the secure resource access protocol. After modification, the response is transmitted via the secure resource access protocol session to the client.Type: GrantFiled: July 28, 2015Date of Patent: September 17, 2019Assignee: SONICWALL INC.Inventors: John E. Gmuender, Huy Minh Nguyen, Joseph H. Levy, Michael B. Massing, Zhong Chen, David M. Telehowski
-
Publication number: 20190260766Abstract: Some embodiments of reassembly-free deep packet inspection (DPD on multicore hardware have been presented. In one embodiment, a set of packets of one or more files is received at a networked device from one or more connections. Each packet is scanned using one of a set of processing cores in the networked device without buffering the one or more files in the networked device. Furthermore, the set of processing cores may scan the packets substantially concurrently.Type: ApplicationFiled: April 30, 2019Publication date: August 22, 2019Inventors: Aleksandr Dubrovsky, John E. Gmuender, Huy Minh Nguyen, Ilya Minkin, Justin M. Brady, Boris Yanovsky
-
Patent number: 10277610Abstract: Some embodiments of reassembly-free deep packet inspection (DPD on multicore hardware have been presented. In one embodiment, a set of packets of one or more files is received at a networked device from one or more connections. Each packet is scanned using one of a set of processing cores in the networked device without buffering the one or more files in the networked device. Furthermore, the set of processing cores may scan the packets substantially concurrently.Type: GrantFiled: August 11, 2014Date of Patent: April 30, 2019Assignee: SONICWALL INC.Inventors: Aleksandr Dubrovsky, John E. Gmuender, Huy Minh Nguyen, Ilya Minkin, Justin M. Brady, Boris Yanovsky
-
Publication number: 20180181453Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: ApplicationFiled: February 20, 2018Publication date: June 28, 2018Inventors: John E. Gmuender, Iosif Harutyunov, Manish Mathur, Ilya Minkin, Huy Minh Nguyen
-
Patent number: 9898356Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: GrantFiled: January 3, 2017Date of Patent: February 20, 2018Assignee: SONICWALL INC.Inventors: John E. Gmuender, Iosif Harutyunov, Manish Mathur, Ilya Minkin, Huy Minh Nguyen
-
Publication number: 20170116057Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: ApplicationFiled: January 3, 2017Publication date: April 27, 2017Inventors: John E. Gmuender, Iosif Harutyunov, Manish Mathur, Ilya Minkin, Huy Minh Nguyen
-
Patent number: 9535773Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: GrantFiled: August 4, 2015Date of Patent: January 3, 2017Assignee: DELL SOFTWARE INC.Inventors: John E. Gmuender, Iosif Harutyunov, Manish Mathur, Ilya Minkin, Huy Minh Nguyen
-
Publication number: 20160026516Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: ApplicationFiled: August 4, 2015Publication date: January 28, 2016Inventors: John E. Gmuender, Iosif Harutyunov, Manish Marthur, Ilya Minkin, Huy Minh Nguyen
-
Publication number: 20150372983Abstract: A method and apparatus for resource locator identifier rewrite have been presented. A security device receives from a resource host over a non-secure hypertext transfer protocol (HTTP) session a response to a request received from a client over a secure HTTP session. The response includes a uniform resource locator (URL) that is supposed to be for a resource host, but the URL does not designate a secure resource access protocol and the resource host requires the secure resource access protocol. The URL is located in the response and modified to designate the secure resource access protocol. After modification, the response is transmitted via the secure resource access protocol session to the client.Type: ApplicationFiled: July 28, 2015Publication date: December 24, 2015Inventors: John E. Gmuender, Huy Minh Nguyen, Joseph H. Levy, Michael B. Massing, Zhong Chen, David M. Telehowski
-
Patent number: 9098330Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: GrantFiled: November 13, 2013Date of Patent: August 4, 2015Assignee: Dell Software Inc.Inventors: John E. Gmuender, Iosif Harutyunov, Manish Marthur, Ilya Minkin, Huy Minh Nguyen
-
Patent number: 9094365Abstract: A method and apparatus for resource locator identifier rewrite have been presented. A security device receives from a resource host over a non-secure hypertext transfer protocol (HTTP) session a response to a request received from a client over a secure HTTP session. The response includes a uniform resource locator (URL) that is supposed to be for a resource host, but the URL does not designate a secure resource access protocol and the resource host requires the secure resource access protocol. The URL is located in the response and modified to designate the secure resource access protocol. After modification, the response is transmitted via the secure resource access protocol session to the client.Type: GrantFiled: March 25, 2013Date of Patent: July 28, 2015Assignee: Dell Software Inc.Inventors: John E. Gmuender, Huy Minh Nguyen, Joseph H. Levy, Michael B. Massing, Zhong Chen, David M. Telehowski
-
Publication number: 20140359764Abstract: Some embodiments of reassembly-free deep packet inspection (DPD on multicore hardware have been presented. In one embodiment, a set of packets of one or more files is received at a networked device from one or more connections. Each packet is scanned using one of a set of processing cores in the networked device without buffering the one or more files in the networked device. Furthermore, the set of processing cores may scan the packets substantially concurrently.Type: ApplicationFiled: August 11, 2014Publication date: December 4, 2014Inventors: Aleksandr Dubrovsky, John E. Gmuender, Huy Minh Nguyen, Ilya Minkin, Justin M. Brady, Boris Yanovsky
-
Patent number: 8813221Abstract: Some embodiments of reassembly-free deep packet inspection (DPI) on multi-core hardware have been presented. In one embodiment, a set of packets of one or more files is received at a networked device from one or more connections. Each packet is scanned using one of a set of processing cores in the networked device without buffering the one or more files in the networked device. Furthermore, the set of processing cores may scan the packets substantially concurrently.Type: GrantFiled: September 25, 2008Date of Patent: August 19, 2014Assignee: SonicWALL, Inc.Inventors: Aleksandr Dubrovsky, John E. Gmuender, Huy Minh Nguyen, Ilya Minkin, Justin M. Brady, Boris Yanovsky
-
Publication number: 20140068622Abstract: A method for packet processing on a multi-core processor. According to one embodiment of the invention, a first set of one or more processing cores are configured to include the capability to process packets belonging to a first set of one or more packet types, and a second set of one or more processing cores are configured to include the capability to process packets belonging to a second set of one or more packet types, where the second set of packet types is a subset of the first set of packet types. Packets belonging to the first set of packet types are processed at a processing core of either the first or second set of processing cores. Packets belonging to the second set of packet types are processed at a processing core of the first set of processing cores.Type: ApplicationFiled: November 13, 2013Publication date: March 6, 2014Applicant: SonicWALL, Inc.Inventors: John E. Gmuender, Iosif Harutyunov, Manish Marthur, Ilya Minkin, Huy Minh Nguyen