Abstract: The present technology describes various embodiments of devices for processing, analyzing, detecting, measuring, and separating fluids. The devices can be used to perform these processes on a microfluidic scale, and with control over fluid and reagent transport. In one embodiment, for example, a device for performing chemical processes can include a porous wick comprising a pathway defined by an input end, an output end, and a length between the input end and the output end. The pathway is configured to wick fluid from the input end to the output end by capillary action. The device can further include a reagent placed on the pathway. The reagent can be placed in a pattern configured to control a spatial or temporal distribution of the reagent along the pathway upon wetting of the pathway.

Abstract: The present technology describes various embodiments of devices for processing, analyzing, detecting, measuring, and separating fluids. The devices can be used to perform these processes on a microfluidic scale, and with control over fluid and reagent transport. In one embodiment, for example, a device for performing chemical processes can include a porous wick comprising a pathway defined by an input end, an output end, and a length between the input end and the output end. The pathway is configured to wick fluid from the input end to the output end by capillary action. The device can further include a reagent placed on the pathway. The reagent can be placed in a pattern configured to control a spatial or temporal distribution of the reagent along the pathway upon wetting of the pathway.

Abstract: Methods and systems for testing PLD interconnect lines, e.g., interconnect lines driven by a plurality of programmable buffers. Each programmable buffer has an associated memory element. The memory elements are configured to form a shift register, with one of the buffers and the interconnect line inserted between two of the memory elements. The signal path through the shift register is tested using a first test pattern. Partial reconfiguration is then used to change the insertion point of the interconnect line in the signal path by changing the configuration of the interconnect structure and using a second one of the buffers. A second test pattern is then used to test the second buffer. This sequence is repeated until each of the buffers has been tested. Because only small changes are required, the partial reconfiguration requires loading only small amounts of configuration data, significantly reducing test time compared to presently-known test methods.