Abstract: The present technology includes a memory device and a method of operating the same. The memory device includes a string including a first select transistor, memory cells, and a second select transistor connected between a source line and a bit line, and a voltage generator configured to supply a precharge voltage to the source line and selectively apply a turn on voltage or a negative voltage to a first select line connected to a gate of the first select transistor. The voltage generator is configured to apply the precharge voltage to the source line, apply the turn on voltage to the first select line during a first time in which a channel layer of the string is precharged, and apply the negative voltage to the first select line during a second time in which the channel layer of the string is precharged, while precharging the channel layer of the string.

Abstract: The present invention relates to a heteroaryl derivative compound and a use thereof. Since the heteroaryl derivative of the present invention exhibits excellent inhibitory activity against EGFR, the heteroaryl derivative can be usefully used as a therapeutic agent for EGFR-associated diseases.

Abstract: A semiconductor device includes a memory string coupled between a source line and a bit line and including a plurality of memory cells, a plurality of word lines, a peripheral circuit configured to apply a program voltage to a word line, apply a first pass voltage to a word line coupled to a first memory cell adjacent to the selected memory cell, and apply a second pass voltage to a second memory cell adjacent to the selected memory cell, and control logic configured to control the peripheral circuit so that the first pass voltage has a higher voltage level than the second pass voltage when a program target level of the selected memory cell is lower than a first threshold value, and the first pass voltage has a lower voltage level than the second pass voltage when the program target level is higher than a second threshold value.

Abstract: A semiconductor device includes a memory string coupled between a source line and a bit line and including a plurality of memory cells, a plurality of word lines, a peripheral circuit configured to apply a program voltage to a word line, apply a first pass voltage to a word line coupled to a first memory cell adjacent to the selected memory cell, and apply a second pass voltage to a second memory cell adjacent to the selected memory cell, and control logic configured to control the peripheral circuit so that the first pass voltage has a higher voltage level than the second pass voltage when a program target level of the selected memory cell is lower than a first threshold value, and the first pass voltage has a lower voltage level than the second pass voltage when the program target level is higher than a second threshold value.

Abstract: A semiconductor device includes a memory string coupled between a source line and a bit line and including a plurality of memory cells, a plurality of word lines, a peripheral circuit configured to apply a program voltage to a word line, apply a first pass voltage to a word line coupled to a first memory cell adjacent to the selected memory cell, and apply a second pass voltage to a second memory cell adjacent to the selected memory cell, and control logic configured to control the peripheral circuit so that the first pass voltage has a higher voltage level than the second pass voltage when a program target level of the selected memory cell is lower than a first threshold value, and the first pass voltage has a lower voltage level than the second pass voltage when the program target level is higher than a second threshold value.

Abstract: A semiconductor device includes a memory string coupled between a source line and a bit line and including a plurality of memory cells, a plurality of word lines, a peripheral circuit configured to apply a program voltage to a word line, apply a first pass voltage to a word line coupled to a first memory cell adjacent to the selected memory cell, and apply a second pass voltage to a second memory cell adjacent to the selected memory cell, and control logic configured to control the peripheral circuit so that the first pass voltage has a higher voltage level than the second pass voltage when a program target level of the selected memory cell is lower than a first threshold value, and the first pass voltage has a lower voltage level than the second pass voltage when the program target level is higher than a second threshold value.

Abstract: The present technique relates to an electronic device, and more particularly, to a semiconductor memory device and an operating method thereof. A semiconductor memory device having improved reliability includes an address decoder applying a program voltage to a selected word line coupled to selected memory cells, among the plurality of memory cells, and a read and write circuit applying a program permission voltage or a program inhibition voltage to bit lines coupled to the selected memory cells, and a control logic controlling the read and write circuit to sequentially apply the program permission voltage and the program inhibition voltage to the bit lines coupled to the selected memory cells when the program voltage is applied.

Abstract: The present technique relates to an electronic device, and more particularly, to a semiconductor memory device and an operating method thereof. A semiconductor memory device having improved reliability includes an address decoder applying a program voltage to a selected word line coupled to selected memory cells, among the plurality of memory cells, and a read and write circuit applying a program permission voltage or a program inhibition voltage to bit lines coupled to the selected memory cells, and a control logic controlling the read and write circuit to sequentially apply the program permission voltage and the program inhibition voltage to the bit lines coupled to the selected memory cells when the program voltage is applied.

Abstract: A semiconductor device according to an embodiment may include cell strings including a plurality of memory cells coupled between bit lines and a source line and coupled to word lines, a peripheral circuit suitable for programming selected memory cells coupled to a selected word line among the word lines by applying a program voltage to the selected word line, and applying one or more pass voltages to unselected word lines, and a control circuit suitable for controlling the peripheral circuit to temporarily float the unselected word lines while the selected memory cells are programmed.

Abstract: A method of manufacturing a semiconductor memory device includes forming a first attached layer on a substrate, forming a stack layer on the first attached layer, separating the stack layer and the first attached layer from each other, forming vertical holes by performing a first etch process on the stack layer in a direction from bottom to top, removing the first attached layer, attaching the stack layer in which the vertical holes are formed to the substrate, and performing a second etch process so that each of the vertical holes has a uniform width.