Patents by Inventor Hyemin Shin

Hyemin Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240110018
    Abstract: The present disclosure relates to a preparation method of a super absorbent polymer having excellent basic absorbency and liquid permeability at the same time by optimizing the degree of cross-linking of a base resin powder and a surface cross-linked layer, and a super absorbent polymer prepared therefrom.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 4, 2024
    Applicant: LG Chem, Ltd.
    Inventors: Tae Young Won, Hyemin Lee, Junwye Lee, Seongbeom Heo, Kwangin Shin, Chang Hun Han
  • Patent number: 10672447
    Abstract: Disclosed is a memory device. The memory device includes a memory cell array that includes a target cell, a row decoder that drive a word line, and a write driver and sense amplifier that are configured to drive a bit line and a source line. The row decoder is configured to drive the word line in a first program operation and a second program operation. Between a start of the first program operation and an end of the second program operation, the write driver and sense amplifier are configured to continuously drive a bit line connected to the target cell with a second driving voltage or drive a source line connected to the target cell with a third driving voltage.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: June 2, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyunsung Jung, Hyemin Shin, Yoonjong Song, Jung Hyuk Lee
  • Publication number: 20200005847
    Abstract: Disclosed is a memory device. The memory device includes a memory cell array that includes a target cell, a row decoder that drive a word line, and a write driver and sense amplifier that are configured to drive a bit line and a source line. The row decoder is configured to drive the word line in a first program operation and a second program operation. Between a start of the first program operation and an end of the second program operation, the write driver and sense amplifier are configured to continuously drive a bit line connected to the target cell with a second driving voltage or drive a source line connected to the target cell with a third driving voltage.
    Type: Application
    Filed: January 30, 2019
    Publication date: January 2, 2020
    Inventors: Hyunsung Jung, HYEMIN SHIN, YOONJONG SONG, JUNG HYUK LEE
  • Patent number: 10255959
    Abstract: A memory device may include a selected bit line connected to a first node and configured to receive a first current, a selected memory cell connected to the selected bit line, a reference bit line connected to a second node and configured to receive a second current, a reference memory cell connected between the reference bit line and a reference source line, a sub bit line connected to the second node, a sub memory cell connected between the sub bit line and a sub source line, and a sense amplifier configured to sense a voltage difference between the first node and the second node to determine data read from a selected memory cell connected to the selected bit line. The sub memory cell may include a cell transistor. A gate electrode of the cell transistor may be connected to the sub source line.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: April 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung Min Lee, Hyemin Shin, Jung Hyuk Lee, Hyunsung Jung
  • Publication number: 20190066748
    Abstract: A memory device may include a selected bit line connected to a first node and configured to receive a first current, a selected memory cell connected to the selected bit line, a reference bit line connected to a second node and configured to receive a second current, a reference memory cell connected between the reference bit line and a reference source line, a sub bit line connected to the second node, a sub memory cell connected between the sub bit line and a sub source line, and a sense amplifier configured to sense a voltage difference between the first node and the second node to determine data read from a selected memory cell connected to the selected bit line. The sub memory cell may include a cell transistor. A gate electrode of the cell transistor may be connected to the sub source line.
    Type: Application
    Filed: April 5, 2018
    Publication date: February 28, 2019
    Inventors: Kyung Min Lee, Hyemin Shin, Jung Hyuk Lee, Hyunsung Jung
  • Publication number: 20080081258
    Abstract: Carbon-coated composite material, manufacturing method thereof, positive electrode active material, and lithium secondary battery comprising the same wherein the composite material is a LixA1?xFeyB1?y(PO4)zC1?z composite carbon-coated by a process of using a carbon precursor in which hydrphilicity and hydrophobicity coexist on LixA1?xFeyB1?y(PO4)zC1?z particles, where 0<x?1, 0?y?1, and 0?z?1, A includes at least one element selected from a group consisting of alkali metals and alkali earth metals, B includes at least one selected from transition metals, C includes at least one selected from negative ions.
    Type: Application
    Filed: September 27, 2007
    Publication date: April 3, 2008
    Inventors: Ketack Kim, Hyun-Soo Kim, Hyemin Shin