Patents by Inventor Hyerim Moon

Hyerim Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10529714
    Abstract: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: January 7, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyerim Moon, Myounghun Choi
  • Publication number: 20180350804
    Abstract: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
    Type: Application
    Filed: July 26, 2018
    Publication date: December 6, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyerim Moon, Myounghun Choi
  • Patent number: 10062691
    Abstract: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: August 28, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyerim Moon, Myounghun Choi
  • Publication number: 20170186744
    Abstract: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
    Type: Application
    Filed: March 16, 2017
    Publication date: June 29, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyerim MOON, Myounghun CHOI
  • Patent number: 9620504
    Abstract: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: April 11, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyerim Moon, Myounghun Choi
  • Publication number: 20160329328
    Abstract: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
    Type: Application
    Filed: February 4, 2016
    Publication date: November 10, 2016
    Inventors: HYERIM MOON, Myounghun Choi
  • Publication number: 20150108584
    Abstract: A semiconductor device includes a first device isolation pattern defining a first active region, a second device isolation pattern defining a second active region, a first gate disposed on the first active region, the first gate including a gate insulating pattern of a first thickness and a second gate disposed on the second active region, the second gate including a gate insulating pattern of a second thickness greater than the first thickness. A top surface of the first device isolation pattern is curved down toward the first active region such that the first active region has an upper portion protruded from the top surface and rounded corners.
    Type: Application
    Filed: December 24, 2014
    Publication date: April 23, 2015
    Inventors: Yangsoo Son, Hyerim Moon, Hagju Cho, Jeongnam Han, Joon Goo Hong