Patents by Inventor Hyongsok Soh

Hyongsok Soh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6711317
    Abstract: In accordance with the invention, a MEMs device comprises a component layer, an actuator layer and an intervening spacer. The component layer, the spacer and the actuator layer are assembled at ambient temperature and held together in lateral alignment by resilient spring members. The spacer provides the walls of a cavity between a component and an actuator to permit movement of the component. The walls are advantageously conductive and cover the bulk of the peripheral boundary of the cavity to provide electrostatic isolation and aerodynamic isolation.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: March 23, 2004
    Assignees: Lucent Technologies Inc., Agere Systems Inc.
    Inventors: Sungho Jin, Hareesh Mavoori, Hyongsok Soh
  • Patent number: 6574026
    Abstract: In accordance with the invention, the component layer, the spacer and the actuator layer of a MEMs device are assembled at ambient temperature and held together in lateral alignment by upper and lower magnets. Such ambient temperature magnetic packaging greatly minimizes the undesirable exposure of the sensitive MEMs components to high temperatures. The resulting MEMs device exhibits the high dimensional accuracy and stability. In a preferred embodiment, the component layer comprises a layer of movable mirrors and a spacer aerodynamically and electrostatically isolates each mirror, minimizing cross-talk between adjacent mirrors.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: June 3, 2003
    Assignees: Agere Systems Inc., Lucent Technologies
    Inventors: Sungho Jin, Hyongsok Soh
  • Publication number: 20030049444
    Abstract: Carbon nanotube growth is achieved in a high-yield process. According to an example embodiment of the present invention, a carbon nanotube device includes a catalyst island, such as Fe2O3, and a carbon nanotube extending therefrom. In one implementation, the catalyst island is disposed on a top surface of a substrate. The carbon nanotube device is useful in a variety of implementations and applications, such as in an atomic force microscope (AFM), in resonators (e.g., where a free end of the carbon nanotube is adapted to vibrate) and in electronic circuits (e.g., where the carbon nanotube is electrically coupled between two nodes, such as between the catalyst island and a circuit node). In addition, growing carbon nanotubes with such a catalyst island is particularly useful in the high-yield growth of a large number of nanotubes.
    Type: Application
    Filed: January 7, 2002
    Publication date: March 13, 2003
    Applicant: Leland Stanford Junior University, the Board of Trustees
    Inventors: Hongjie Dai, Calvin F. Quate, Hyongsok Soh, Jing Kong
  • Patent number: 6519075
    Abstract: A MEMs device comprises a component layer including a frame structure and at least one component movably coupled to the frame and an actuator layer including at least one conductive path and at least one actuator for moving the component. The component layer and the actuator layer are bonded together with solder or other materials in lateral alignment. Advantageously the layers are provided with metallization pads and are bonded together in lateral alignment with predetermined vertical gap spacing by solder bonds between the pads. In a preferred embodiment the MEMs device, however bonded, comprises a component layer, an actuator layer and an intervening spacer. The spacer provides the walls of a cavity between the component and the pertinent actuators to permit movement of the component. The walls cover the bulk of the peripheral boundary of the cavity to provide aerodynamic isolation. Advantageously the walls are conductive to provide electrostatic isolation.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: February 11, 2003
    Assignees: Agere Systems Inc., Lucent Technologies Inc.
    Inventors: Dustin W. Carr, Dennis S. Greywall, Sungho Jin, Flavio Pardo, Hyongsok Soh
  • Patent number: 6442307
    Abstract: In accordance with the invention, a MEMs mirror device comprises a mirror layer including a frame structure and at least one mirror movably coupled to the frame and an actuator layer including at least one conductive path and at least one electrode for moving the mirror. The mirror layer and the actuator layer are provided with metallization pads and are bonded together in lateral alignment and with predetermined vertical gap spacing by solder bonds between the pads. The device has utility in optical cross connection, variable attenuation and power gain equalization.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: August 27, 2002
    Assignees: Lucent Technologies Inc., Agere Systems Guardian Corp.
    Inventors: Dustin W. Carr, Dennis S. Greywall, Sungho Jin, Flavio Pardo, Hyongsok Soh
  • Publication number: 20020097952
    Abstract: In accordance with the invention, a MEMs device comprises a component layer, an actuator layer and an intervening spacer. The component layer, the spacer and the actuator layer are assembled at ambient temperature and held together in lateral alignment by resilient spring members. The spacer provides the walls of a cavity between a component and an actuator to permit movement of the component. The walls are advantageously conductive and cover the bulk of the peripheral boundary of the cavity to provide electrostatic isolation and aerodynamic isolation.
    Type: Application
    Filed: January 25, 2001
    Publication date: July 25, 2002
    Inventors: Sungho Jin, Hareesh Mavoori, Hyongsok Soh
  • Publication number: 20020071166
    Abstract: In accordance with the invention, the component layer, the spacer and the actuator layer of a MEMs device are assembled at ambient temperature and held together in lateral alignment by upper and lower magnets. Such ambient temperature magnetic packaging greatly minimizes the undesirable exposure of the sensitive MEMs components to high temperatures. The resulting MEMs device exhibits the high dimensional accuracy and stability. In a preferred embodiment, the component layer comprises a layer of movable mirrors and a spacer aerodynamically and electrostatically isolates each mirror, minimizing cross-talk between adjacent mirrors.
    Type: Application
    Filed: December 7, 2000
    Publication date: June 13, 2002
    Inventors: Sungho Jin, Hyongsok Soh
  • Publication number: 20020054422
    Abstract: A MEMs device comprises a component layer including a frame structure and at least one component movably coupled to the frame and an actuator layer including at least one conductive path and at least one actuator for moving the component. The component layer and the actuator layer are bonded together with solder or other materials in lateral alignment. Advantageously the layers are provided with metallization pads and are bonded together in lateral alignment with predetermined vertical gap spacing by solder bonds between the pads. In a preferred embodiment the MEMs device, however bonded, comprises a component layer, an actuator layer and an intervening spacer. The spacer provides the walls of a cavity between the component and the pertinent actuators to permit movement of the component. The walls cover the bulk of the peripheral boundary of the cavity to provide aerodynamic isolation. Advantageously the walls are conductive to provide electrostatic isolation.
    Type: Application
    Filed: January 25, 2001
    Publication date: May 9, 2002
    Inventors: Dustin W. Carr, Dennis S. Greywall, Sungho Jin, Flavio Pardo, Hyongsok Soh
  • Patent number: 6355498
    Abstract: A new bulk resonator may be fabricated by a process that is readily incorporated in the traditional fabrication techniques used in the fabrication of monolithic integrated circuits on a wafer. The resonator is decoupled from the wafer by a cavity etched under the resonator using selective etching through front openings (vias) in a resonator membrane. In a typical structure the resonator is formed over a silicon wafer by first forming a first electrode, coating a piezoelectric layer over both the electrode and the wafer surface and forming a second electrode opposite the first on the surface of the piezoelectric layer. After this structure is complete, a number of vias are etched in the piezoelectric layer exposing the surface under the piezoelectric layer to a selective etching process that selectively attacks the surface below the piezoelectric layer creating a cavity under the resonator.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: March 12, 2002
    Assignee: Agere Systems Guartian Corp.
    Inventors: Edward Chan, Harold Alexis Huggins, Jungsang Kim, Hyongsok Soh
  • Patent number: 6346189
    Abstract: The present invention includes several nanotube structures which can be made using catalyst islands disposed on a substrate (e.g. silicon, alumina, or quartz) or on the free end of an atomic force microscope cantilever. The catalyst islands are capable of catalyzing the growth of carbon nanotubes from carbon containing gases (e.g. methane). The present invention includes an island of catalyst material (such as Fe2O3) disposed on the substrate with a carbon nanotube extending from the island. Also included in the present invention is a pair of islands with a nanotube extending between the islands, electrically connecting them. Conductive metal lines connected to the islands (which may be a few microns on a side) allows for external circuitry to connect to the nanotube. Such a structure can be used in many different electronic and microelectromechanical devices. For example, a nanotube connected between two islands can function as a resonator if the substrate beneath the nanotube is etched away.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: February 12, 2002
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Hongjie Dai, Calvin F. Quate, Hyongsok Soh, Jing Kong
  • Patent number: 6000947
    Abstract: A scanning probe microscope is used to fabricate a gate or other feature of a transistor by scanning a silicon substrate in which the transistor is to be formed. An electric field is created between the cantilever tip and the silicon substrate, thereby causing an oxide layer to be formed on the surface of the substrate. As the tip is scanned across the substrate the electric field is switched on and off so that an oxide pattern is formed on the silicon. Preferably, the oxide pattern is formed on a deposited layer of amorphous silicon. Extremely small features, e.g., a MOSFET gate having a length of 0.2 .mu.m or less can be fabricated by this technique.
    Type: Grant
    Filed: November 1, 1995
    Date of Patent: December 14, 1999
    Assignee: The Board of Trustees of the Leland Stanford, Jr.
    Inventors: Stephen Charles Minne, Hyongsok Soh, Calvin F. Quate
  • Patent number: 5894452
    Abstract: An ultrasonic capacitance transducer having a sealed membrane supported above a conductive substrate by thin insulating material to form a sealed evacuated cavity whereby the transducer can operate immersed in fluid.
    Type: Grant
    Filed: October 29, 1996
    Date of Patent: April 13, 1999
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Igal Ladabaum, Butrus Thomas Khuri-Yakub, Hyongsok Soh
  • Patent number: 5618760
    Abstract: A scanning probe microscope is used to pattern a layer of resist, and the pattern is transferred to a substrate. First, an underlayer formed of, for example, polyimide and a top layer formed of, for example, amorphous silicon are deposited on the substrate. A pattern is formed on the top layer using the tip of the cantilever in a scanning probe microscope. The pattern may consist of an oxide formed by an electric field at the cantilever tip. The top layer is then etched using the pattern as a mask and using an etchant that is selective against the underlayer. The underlayer is then etched using an etchant that is selective against the top layer and substrate. The substrate is etched with an etchant that removes the top layer but is selective against the underlayer. Finally, the underlayer is removed.
    Type: Grant
    Filed: September 23, 1994
    Date of Patent: April 8, 1997
    Assignee: The Board of Trustees of the Leland Stanford, Jr. University
    Inventors: Hyongsok Soh, Stephen C. Minne, Calvin F. Quate