Abstract: Technologies are described for performing replication within a database environment. Where a database transaction is replicated at multiple replica nodes, a replica node is selected as a coordinator replica node for the transaction. The other replica node or nodes are designated as follower replica nodes for the transaction. A follower replica node sends the coordinator replica node a precommit notification when the follower replica node has precommitted the transaction. The coordinator replica node sends the follower replica node a postcommit notification to commit the transaction when the transaction has been precommitted by all of the replica nodes to which the transaction is to be replicated.

Abstract: Disclosed herein are system, method, and computer program product embodiments for synchronizing lost change between a source table and a replica table. An embodiment operates by detecting a restart at a source node or a replica node. Row-ID values of replication log entries are then compared to row-ID column values of rows at a replica table of the replica node. Replication errors at a source table or the replica table are then determined based on the row-ID comparison. The rows of the source table and the replica table are then updated based on the determination.

Abstract: Disclosed herein are system, method, and computer program product embodiments for removing a deadlock during replication from distributed source tables to a replica node. An embodiment operates by detecting a deadlock at a parallel log replayer at a replica node. A first replication log entry from a queue at the parallel log replayer is then selected based on whether removing the first replication log entry from the queue removes the deadlock. The first replication log entry is then forwarded to a waiting queue. A second replication log entry is then replayed at the parallel log replayer. After replaying the second replication log entry, the first replication log entry is replayed at the parallel log replayer.

Abstract: Disclosed herein are system, method, and computer program product embodiments for replicating a database transaction to a replica table. An embodiment operates by receiving a replication log entry and an associated transaction commit log entry for a database transaction to be replayed to a row at a replica table. A row-ID value of the replication log entry is compared to a row-ID column value of the row at the replica table. The replication log entry is then replayed at a parallel log replayer based on the comparison. The database transaction is then committed to the replica table by replaying the associated transaction commit log entry at a transaction log replayer.

Abstract: Technologies are described for performing replication of data within a database environment having a source node and a replica node. The source node executes a database operation on at least one database table stored by the source node. The source node asynchronously sends the database operation to the replica node. A prepare commit request is synchronously sent from the source node to the replica node. The source node receives a synchronous precommit acknowledgement from the replica node. The precommit acknowledgement indicates that the database operation was executed at the replica node. The source node commits a transaction associated with the database operation.

Abstract: Technologies are described for performing replication within a database environment. Where a database transaction is replicated at multiple replica nodes, a replica node is selected as a coordinator replica node for the transaction. The other replica node or nodes are designated as follower replica nodes for the transaction. A follower replica node sends the coordinator replica node a precommit notification when the follower replica node has precommitted the transaction. The coordinator replica node sends the follower replica node a postcommit notification to commit the transaction when the transaction has been precommitted by all of the replica nodes to which the transaction is to be replicated.

Abstract: Technologies are described for performing replication within a database environment. Where database operations are carried out at multiple source nodes, the operations can be ordered by the source node on which they were executable prior to being replayed at a replica node. In addition, the operations can be precommitted, so that the operations can be reviewed by a replayer at the replica node before the transaction containing the operations has been fully committed.

Abstract: Disclosed herein are system, method, and computer program product embodiments for removing a deadlock during replication from distributed source tables to a replica node. An embodiment operates by detecting a deadlock at a parallel log replayer at a replica node. A first replication log entry from a queue at the parallel log replayer is then selected based on whether removing the first replication log entry from the queue removes the deadlock. The first replication log entry is then forwarded to a waiting queue. A second replication log entry is then replayed at the parallel log replayer. After replaying the second replication log entry, the first replication log entry is replayed at the parallel log replayer.

Abstract: Disclosed herein are system, method, and computer program product embodiments for replicating a database transaction to a replica table. An embodiment operates by receiving a replication log entry and an associated transaction commit log entry for a database transaction to be replayed to a row at a replica table. A row-ID value of the replication log entry is compared to a row-ID column value of the row at the replica table. The replication log entry is then replayed at a parallel log replayer based on the comparison. The database transaction is then committed to the replica table by replaying the associated transaction commit log entry at a transaction log replayer.

Abstract: A semiconductor device is capable of generating an internal voltage having a voltage level that is dependent on an external power supply voltage. The semiconductor device includes an internal voltage generation unit configured to generate a plurality of internal voltages having different voltage levels by using an external power supply voltage, a voltage level detection unit configured to detect a voltage level of the external power supply voltage, and a selection unit configured to selectively output one of the internal voltages in response to a detection result of the voltage level detection unit.

Abstract: A memory device includes a first bank group, a second bank group, where the first and second bank groups are each configured to output multi-bit data in parallel in response to a read command, a data transferor configured to receive the multi-bit data outputted in parallel from the first bank group or the second bank group and output the multi-bit data at a time interval corresponding to an operation mode, first global data buses configured to transfer the multi-bit data outputted from the first bank group to the data transferor, second global data buses configured to transfer the multi-bit data outputted from the second bank group to the data transferor, and a parallel-to-serial converter configured to convert the multi-bit data outputted from the data transferor into serial data according to the operation mode.

Abstract: A semiconductor device is capable of generating an internal voltage having a voltage level that is dependent on an external power supply voltage. The semiconductor device includes an internal voltage generation unit configured to generate a plurality of internal voltages having different voltage levels by using an external power supply voltage, a voltage level detection unit configured to detect a voltage level of the external power supply voltage, and a selection unit configured to selectively output one of the internal voltages in response to a detection result of the voltage level detection unit.

Abstract: A data transfer circuit includes a serial-to-parallel converter configured to convert multi-bit data inputted in series into parallel data by controlling the number of bits of the parallel data and a conversion timing based on an operation mode, and a data transmission unit configured to transfer the parallel data to a first data path or a second data path based on the operation mode.

Abstract: A signal delay circuit including a clock transfer control circuit configured to transmit or block a clock signal, and a pulse signal generation circuit configured to delay a first pulse signal in response to the transmitted clock signal to generate a second pulse signal which has a longer active period than the first pulse signal.

Abstract: A signal delay circuit including a clock transfer control circuit configured to transmit or block a clock signal, and a pulse signal generation circuit configured to delay a first pulse signal in response to the transmitted clock signal to generate a second pulse signal which has a longer active period than the first pulse signal.

Abstract: A memory device includes a first bank group, a second bank group, where the first and second bank groups are each configured to output multi-bit data in parallel in response to a read command, a data transferor configured to receive the multi-bit data outputted in parallel from the first bank group or the second bank group and output the multi-bit data at a time interval corresponding to an operation mode, first global data buses configured to transfer the multi-bit data outputted from the first bank group to the data transferor, second global data buses configured to transfer the multi-bit data outputted from the second bank group to the data transferor, and a parallel-to-serial converter configured to convert the multi-bit data outputted from the data transferor into serial data according to the operation mode.

Abstract: A data transfer circuit includes a serial-to-parallel converter configured to convert multi-bit data inputted in series into parallel data by controlling the number of bits of the parallel data and a conversion timing based on an operation mode, and a data transmission unit configured to transfer the parallel data to a first data path or a second data path based on the operation mode.

Abstract: A signal delay circuit including a clock transfer control circuit configured to transmit or block a clock signal, and a pulse signal generation circuit configured to delay a first pulse signal in response to the transmitted clock signal to generate a second pulse signal which has a longer active period than the first pulse signal.

Abstract: A signal delay circuit including a clock transfer control circuit configured to transmit or block a clock signal, and a pulse signal generation circuit configured to delay a first pulse signal in response to the transmitted clock signal to generate a second pulse signal which has a longer active period than the first pulse signal.

Abstract: A semiconductor device is capable of generating an internal voltage having a voltage level that is dependent on an external power supply voltage. The semiconductor device includes an internal voltage generation unit configured to generate a plurality of internal voltages having different voltage levels by using an external power supply voltage, a voltage level detection unit configured to detect a voltage level of the external power supply voltage, and a selection unit configured to selectively output one of the internal voltages in response to a detection result of the voltage level detection unit.