Patents by Inventor Hyoung Suk Kim

Hyoung Suk Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190275344
    Abstract: The present invention provides a plasma discharged skin treatment device. The plasma discharged skin treatment device of present invention includes a first insulator, a first electrode provided on one surface of the first insulator, a second insulator provided on one surface of the first electrode, a second electrode provided on one surface of the second insulator, and a third insulator provided on one surface of the second electrode to face a skin of a user, wherein a plasma is generated by a power applied between the first electrode and the second electrode. According to the present invention, there is provided a large-area plasma discharged skin treatment device which is capable of being flexibly deformed along a facial surface of a user while allowing to be semipermanently used.
    Type: Application
    Filed: April 20, 2017
    Publication date: September 12, 2019
    Inventor: Hyoung Suk KIM
  • Patent number: 9412720
    Abstract: A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: August 9, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Duk Nam, Jin-Ho Kim, Hyuk-Su Kim, Hyoung-Suk Kim, Tae-Young Lee
  • Publication number: 20140167291
    Abstract: A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.
    Type: Application
    Filed: February 20, 2014
    Publication date: June 19, 2014
    Inventors: Tae-Duk Nam, Jin-Ho Kim, Hyuk-Su Kim, Hyoung-Suk Kim, Tae-Young Lee
  • Patent number: 8674494
    Abstract: A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: March 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Duk Nam, Jin-Ho Kim, Hyuk-Su Kim, Hyoung-Suk Kim, Tae-Young Lee
  • Patent number: 8669078
    Abstract: Disclosed herein are ammonia-specific 5?-XMP aminase mutants and a method for preparing the same. A mutation is introduced into the active site of glutamine-dependent catalysis in 5?-XMP aminase. The resulting 5?-XMP aminase mutant is devoid of the glutamine-dependent activity and specifically reacts with external ammonia in converting 5?-XMP into 5?-GMP. Thus, the ammonia-specific 5?-XMP aminase mutant is stabler within cells compared to the wild type, and can be useful in the industrial conversion of 5?-XMP into 5?-GMP.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: March 11, 2014
    Assignee: CJ Cheiljedang Corporation
    Inventors: Jae-Gu Pan, Heung-Chae Jung, Eui-Joong Kim, Han-Seung Lee, Young Hoon Park, Hyoung Suk Kim, Jong-Kwon Han, Jin Nam Lee, Ki-Hoon Oh, Jeong Hwan Kim, Yoon-Suk Oh, Jae Ick Sim, Kuk-Ki Hong, Kyung Oh Choi, Hyun Soo Kim, Min-Ji Baek, Tae Sun Kang
  • Publication number: 20130049228
    Abstract: A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.
    Type: Application
    Filed: August 1, 2012
    Publication date: February 28, 2013
    Inventors: Tae-Duk NAM, Jin-Ho Kim, Hyuk-Su Kim, Hyoung-Suk Kim, Tae-Young Lee
  • Patent number: 8063313
    Abstract: A printed circuit board (PCB) and a semiconductor package that are configured to prevent delamination and voids. In one example embodiment, the semiconductor package includes a PCB having a base substrate on which conductive patterns are formed and which includes an interior region having a die paddle for receiving a semiconductor chip and an exterior region disposed outside the interior region. The PCB also includes a first solder resist formed on a portion of the base substrate corresponding to the interior region and a second solder resist formed on a portion of the base substrate corresponding to the exterior region. The second solder resist may also have a greater surface roughness than the surface roughness of the first solder resist.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: November 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun-Jin Oh, Chang-Hoon Han, Kwang-Ryul Lee, Hyoung-Suk Kim
  • Patent number: 7741101
    Abstract: Provided are mutant strains derived from Escherichia sp. GPU1114 (Accession No. KCCM-10536), having cumulative inactivation of deoD, aphA, appA, and hprt genes, and methods of using the same.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: June 22, 2010
    Assignee: CJ Cheiljedang Corporation
    Inventors: Young-hoon Park, Hyoung-suk Kim, Jin-nam Lee, Ko-hoon Oh, Jeong-hwan Kim, Yoon-suk Oh, Jae-ick Sim, Kyung-oh Choi
  • Publication number: 20100007007
    Abstract: A semiconductor package includes: a semiconductor chip having a first surface, and a second surface that is opposite to the first surface and allows a semiconductor device to be formed thereon; bonding pads disposed on the second surface of the semiconductor chip; and a metal ion barrier layer disposed on the first surface of the semiconductor chip, and preventing metal ions from penetrating into the semiconductor chip through the first surface of the semiconductor chip. Accordingly, the semiconductor package can obtain a superior semiconductor device by minimizing moisture absorption and effectively blocking the penetration of metal ions.
    Type: Application
    Filed: July 2, 2009
    Publication date: January 14, 2010
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Sung-hwan YOON, Jai-kyeong Shin, Yong-nam Koh, Hyoung-suk Kim, In-ku Kang, Ho-jin Lee, Sang-wook Park, Joong-kyo Kook, Min-young Son, Soong-yong Hur
  • Publication number: 20090179335
    Abstract: A printed circuit board (PCB) and a semiconductor package that are configured to prevent delamination and voids. In one example embodiment, the semiconductor package includes a PCB having a base substrate on which conductive patterns are formed and which includes an interior region having a die paddle for receiving a semiconductor chip and an exterior region disposed outside the interior region. The PCB also includes a first solder resist formed on a portion of the base substrate corresponding to the interior region and a second solder resist formed on a portion of the base substrate corresponding to the exterior region. The second solder resist may also have a greater surface roughness than the surface roughness of the first solder resist.
    Type: Application
    Filed: November 3, 2008
    Publication date: July 16, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yun-Jin OH, Chang-Hoon HAN, Kwang-Ryul LEE, Hyoung-Suk KIM
  • Publication number: 20080318278
    Abstract: Disclosed herein are ammonia-specific 5?-XMP aminase mutants and a method for preparing the same. A mutation is introduced into the active site of glutamine-dependent catalysis in 5?-XMP aminase. The resulting 5?-XMP aminase mutant is devoid of the glutamine-dependent activity and specifically reacts with external ammonia in converting 5?-XMP into 5?-GMP. Thus, the ammonia-specific 5?-XMP aminase mutant is stabler within cells compared to the wild type, and can be useful in the industrial conversion of 5?-XMP into 5?-GMP.
    Type: Application
    Filed: December 14, 2006
    Publication date: December 25, 2008
    Applicant: CJ CHEILJEDANG CORPORATION
    Inventors: Jae-Gu Pan, Heung-Chae Jung, Eui-Joong Kim, Han-Seung Lee, Young Hoon Park, Hyoung Suk Kim, Jong-Kwon Han, Jin Nam Lee, Ki-Hoon Oh, Jeong Hwan Kim, Yoon-Suk Oh, Jae Ick Sim, Kuk-Ki Hong, Kyung Oh Choi, Hyun Soo Kim, Min-Ji Baek, Tae Sun Kang
  • Publication number: 20080299620
    Abstract: Provided are mutant strains derived from Escherichia sp. GPU1114 (Accession No. KCCM-10536), having cumulative inactivation of deoD, aphA, appA, and hprt genes, and methods of using the same.
    Type: Application
    Filed: January 20, 2006
    Publication date: December 4, 2008
    Applicant: CJ CORP.
    Inventors: Young-hoon Park, Hyoung-suk Kim, Jin-nam Lee, Ki-hoon Oh, Jeong-hwan Kim, Yoon-suk Oh, Jae-ick Sim, Kyung-oh Choi
  • Patent number: 6955907
    Abstract: A novel alkaline protease VapK suitable for a laundry detergent is disclosed. The gene vapk coding for the protease VapK, the recombinant plasmids containing said gene, and the transformed V. metshnikovii KS1 (pSBCm) with said recombinant plasmid are also disclosed. In addition, a process for producing the protease VapK is disclosed.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: October 18, 2005
    Assignee: Cheil Jedang Corporation
    Inventors: Ghee Hong Jin, Hyoung Suk Kim, Hyune Mo Rho, Hyune Whan Lee