Abstract: A multichip package and a method for manufacturing the same are provided. A multichip package includes: a plurality of semiconductor chips each mounted on corresponding lead frame pads; lead frames connected to the semiconductor chips by a bonding wire; and fixed frames integrally formed with at least one of the lead frame pads and configured to support the lead frame pads on a package-forming substrate.

Abstract: A damper for a turbine rotor assembly of a gas turbine engine is disclosed. The damper may have a forward plate. The damper may further have an aft plate including a larger surface area than the forward plate. The aft plate may have at least one aperture for regulating a flow of gas through the aft plate. The damper may also have a longitudinal structure connecting the forward plate and the aft plate.

Abstract: A damper for a turbine rotor assembly of a gas turbine engine is disclosed. The damper may have a forward plate. The damper may further have an aft plate including a larger surface area than the forward plate. The aft plate may have at least one aperture for regulating a flow of through the aft plate. The damper may also have a longitudinal structure connecting the forward plate and the aft plate.

Abstract: A damper for a turbine rotor assembly of a gas turbine engine is disclosed. The damper may have a forward plate. The damper may further have an aft plate including a larger surface area than the forward plate. The aft plate may have at least one aperture for regulating a flow of gas through the aft plate. The damper may also have a longitudinal structure connecting the forward plate and the aft plate.

Abstract: A turbine blade is disclosed. The turbine blade may have an airfoil extending from a first surface of a turbine platform. The turbine blade may further have a first side pocket of the turbine platform that is configured to substantially entirely house a first moveable seal between a forward wall of the first side pocket and an aft wall of the first side pocket. The first side pocket may have a convex surface, extending between the forward wall and the aft wall, and a concave surface. The turbine blade may also have a second side pocket of the turbine platform configured to receive a portion of a second moveable seal.

Abstract: A laterally double-diffused metal oxide semiconductor (LDMOS) and a method for fabrication thereof includes a well region formed in a semiconductor substrate having an active region defined by device isolation layers, a body region formed over the well region, a drain region spaced from the body region at a constant interval and formed above the well region, a source region and a source contact region formed in the body region in structural communication with the source region, a drift region having a trench formed therein formed in the well region between the body region and the drain region, and a gate formed over the semiconductor substrate which partially overlaps the source region and the drift region.

Abstract: A capacitor and methods for manufacturing the capacitor are disclosed. The method may include forming a first electrode on a substrate, forming a dielectric layer on the first electrode, the dielectric layer having a first silicon oxide (SiO2) layer, a zirconium-doped hafnium oxide (Zr-doped HfO2) layer and a second silicon oxide layer sequentially, and forming a second electrode on the dielectric layer.

Abstract: A damper for a turbine rotor assembly of a gas turbine engine is disclosed. The damper may have a forward plate. The damper may further have an aft plate including a larger surface area than the forward plate. The aft plate may have at least one aperture for regulating a flow of through the aft plate. The damper may also have a longitudinal structure connecting the forward plate and the aft plate.

Abstract: A turbine blade is disclosed. The turbine blade may have an airfoil extending from a first surface of a turbine platform. The turbine blade may further have a first side pocket of the turbine platform that is configured to substantially entirely house a first moveable seal between a forward wall of the first side pocket and an aft wall of the first side pocket. The first side pocket may have a convex surface, extending between the forward wall and the aft wall, and a concave surface. The turbine blade may also have a second side pocket of the turbine platform configured to receive a portion of a second moveable seal.

Abstract: A semiconductor memory device and a method of expanding a valid output data window are described. The semiconductor memory device includes a memory cell array and an output circuit. The memory cell array generates read data having a plurality of bits. The output circuit outputs the read data sequentially in response to a clock signal in a normal mode. On the other hand, the output circuit selectively outputs the bits of the read data by latching bits to be tested among bits of the read data, and by electrically disconnecting bits not to be tested among bits of the read data in response to a plurality of switch control signals in a test mode. Therefore a valid data window of an output data may be expanded.

Abstract: A semiconductor memory device and a method of expanding a valid output data window are described. The semiconductor memory device includes a memory cell array and an output circuit. The memory cell array generates read data having a plurality of bits. The output circuit outputs the, read data sequentially in response to a clock signal in a normal mode. On the other hand, the output circuit selectively outputs the bits of the read data by latching bits to be tested among bits of the read data, and by electrically disconnecting bits not to be tested among bits of the read data in response to a plurality of switch control signals in a test mode. Therefore a valid data window of an output data may be expanded.

Abstract: Provided are a duty cycle correction circuit and method for duty cycle correction in a delay locked loop using an inversion locking scheme.

Abstract: Provided are a duty cycle correction circuit and method for duty cycle correction in a delay locked loop using an inversion locking scheme.

Abstract: An integrated circuit memory device includes a test pattern data generator circuit that is configured to generate an extended test pattern data based on test pattern data provided to the memory device during a test mode of the memory device and is configured to provide the extended test pattern data and the test pattern data during a test mode of the memory device. Related methods are also disclosed.

Abstract: An integrated circuit memory device includes a test pattern data generator circuit that is configured to generate an extended test pattern data based on test pattern data provided to the memory device during a test mode of the memory device and is configured to provide the extended test pattern data and the test pattern data during a test mode of the memory device. Related methods are also disclosed.