Abstract: An atomic layer deposition method for manufacturing a platinum-based alloy catalyst includes applying a support in a reactor and depositing an alloy of platinum and a non-platinum metal on the support through a super cycle comprising a first sub-cycle and a second sub-cycle.

Abstract: A semiconductor chip package eliminates and minimizes a power noise generated from a voltage generation circuit in the semiconductor chip package includes an integrated circuit chip with a voltage generation circuit that receives an external voltage to generate a supply voltage to be used in an internal circuit and a connection terminal connected to an output node of the voltage generation circuit, and a mounting substrate including a noise eliminator electrically connected to the connection terminal to reduce a power noise of the supply voltage and a mounting substrate to mount the integrated circuit chip to package the integrated circuit chip as the semiconductor chip package.

Abstract: An apparatus to package a semiconductor chip includes a coil configured to use induction heating to reflow a solder ball of the semiconductor chip. The coil includes a first body, a second body parallel to the first body, a third body extending from the first body to the second body. The first and second bodies are symmetrical with respect to a vertical plane disposed therebetween. The first and second bodies have inclined surfaces facing each other, and the inclined surfaces are distant from each other downward.

Abstract: A semiconductor chip package illuminates and minimizes a power noise generated from a voltage generation circuit in the semiconductor chip package includes an integrated circuit chip with a voltage generation circuit that receives an external voltage to generate a supply voltage to be used in an internal circuit and a connection terminal connected to an output node of the voltage generation circuit, and a mounting substrate including a noise eliminator electrically connected to the connection terminal to reduce a power noise of the supply voltage and a mounting substrate to mount the integrated circuit chip to package the integrated circuit chip as the semiconductor chip package.

Abstract: An apparatus to package a semiconductor chip includes a coil configured to use induction heating to reflow a solder ball of the semiconductor chip. The coil includes a first body, a second body parallel to the first body, a third body extending from the first body to the second body. The first and second bodies are symmetrical with respect to a vertical plane disposed therebetween. The first and second bodies have inclined surfaces facing each other, and the inclined surfaces are distant from each other downward.