Abstract: A method of manufacturing a slim foam pad for vehicle seats, may include injecting a first foam solution into a first mold to manufacture an upper pad; inserting the manufactured upper pad into a second mold; and injecting a second foam solution to a first surface of the upper pad inserted into the second mold to manufacture a lower pad integrally coupled to the upper pad, wherein the second foam solution is foamed in a state of being in direct contact with the first surface of the upper pad, wherein no additional border separation member is provided at a border between the upper pad and the lower pad.

Abstract: A novel antibody against VEGFR2 for use in the prevention or treatment of macular degeneration and cancer, which are angiogenesis-related diseases. The antibody of the present invention is an antibody which specifically binds to VEGFR2 which is overexpressed in vascular endothelial cells. The antibody of the present invention has very low homology compared to the CDR sequences of conventional VEGFR2 target antibodies, and thus is unique in its sequence. Since the antibody of the present invention, when treated alone, has the ability to inhibit vascular endothelial cell growth equivalent to that of ramucirumab which is conventionally used, it is very effective to prevent or treat angiogenesis-related diseases.

Abstract: Provided is an integrated circuit including at least one cell, the at least one cell includes first and second active regions spaced apart from each other, a dummy region disposed between the first and second active regions, at least one first active fin disposed in the first active region and extending in a first direction, at least one second active fin extending along the first direction over the entire length of the second active region, and an active gate line extending in a second direction that is substantially perpendicular to the first direction, wherein the active gate line vertically overlaps the first active region and the dummy region and does not vertically overlap the second active region.

Abstract: A method of manufacturing a slim foam pad for vehicle seats, may include injecting a first foam solution into a first mold to manufacture an upper pad; inserting the manufactured upper pad into a second mold; and injecting a second foam solution to a first surface of the upper pad inserted into the second mold to manufacture a lower pad integrally coupled to the upper pad, wherein the second foam solution is foamed in a state of being in direct contact with the first surface of the upper pad, wherein no additional border separation member is provided at a border between the upper pad and the lower pad.

Abstract: A battery cell has a structure in which outer peripheral portions of a battery case are sealed by thermal bonding in a state in which an electrode assembly is mounted together with an electrolyte in a battery case made of a laminate sheet, wherein a pair of electrode leads of the electrode assembly protrude outward from the battery case, and an insulating member is attached to each of the electrode leads in an area of at least 60% of a total area of the electrode leads that protrude outwardly.

Abstract: A global construction business management apparatus and a global construction business management system using the same. The global construction business management apparatus includes: an electric manual unit: deriving a task hierarchy in life stages to include a ‘plan and program stage’, a ‘design stage’, a ‘construction order and contract stage’, a ‘construction stage’, and an ‘operation and maintenance stage’ based on business process breakdown structure (BPS) information; providing to a responsible entity information required for performing a task; and providing performed task information to any one of the responsible entity, a revising entity, or an assigning entity; and a BPS mapping unit providing visualized information so that a temporal flow of the task hierarchy in life can be easily comprehended. Accordingly, an i-PgMIS is applied to a global construction project and used for various businesses by improving the i-PgMIS that is limited to an urban regeneration business.

Abstract: The present invention relates to a skin administration system capable of improving the efficiency of skin delivery of an ingredient for controlling release of neurotransmitters and, particularly, to a microneedle containing an ingredient for controlling release of neurotransmitters.

Abstract: Provided is an integrated circuit including at least one cell, the at least one cell includes first and second active regions spaced apart from each other, a dummy region disposed between the first and second active regions, at least one first active fin disposed in the first active region and extending in a first direction, at least one second active fin extending along the first direction over the entire length of the second active region, and an active gate line extending in a second direction that is substantially perpendicular to the first direction, wherein the active gate line vertically overlaps the first active region and the dummy region and does not vertically overlap the second active region.

Abstract: A polyurethane foam with reduced formaldehyde and acrolein emissions, which is manufactured from a polyol system including polyol, a foam stabilizer, a foaming agent, and a liquid aldehyde reducing agent.

Abstract: Provided is an integrated circuit including at least one cell, the at least one cell includes first and second active regions spaced apart from each other, a dummy region disposed between the first and second active regions, at least one first active fin disposed in the first active region and extending in a first direction, at least one second active fin extending along the first direction over the entire length of the second active region, and an active gate line extending in a second direction that is substantially perpendicular to the first direction, wherein the active gate line vertically overlaps the first active region and the dummy region and does not vertically overlap the second active region.

Abstract: A semiconductor device includes a substrate on which a plurality of logic cells are provided, and a plurality of active portions provided on the substrate and extending in a first direction. Contacts and gate structures extend in a second direction intersecting the first direction and are alternately arranged. A common conductive line extends along a boundary region of the plurality of logic cells in the first direction. At least one of the contacts is electrically connected to the common conductive line through a via therebetween, and each of the contacts intersects a plurality of the active portions. End portions of the contacts are aligned with each other along the first direction.

Abstract: A design rule generating method is provided. The method includes receiving a test pattern, providing a plurality of workflows, which correspond to the test pattern and are preset in relation to a lithography model and a mask generation method, and performing simulation on the test pattern according to a workflow selected from the workflows.

Abstract: A method of forming a pattern includes defining a plurality of patterns, defining a plurality of pitch violating patterns that contact the plurality of patterns and correspond to regions between the patterns, classifying the plurality of pitch violating patterns into a first region and a second region that is adjacent to the first region, selecting one of the first region and the second region, and forming an initial pattern defined as the selected first or second region. The selecting includes performing at least one of i) selecting a region that contact dummy patterns, ii) selecting a region of a same kind as one region, and iii) selecting a region that contacts a concave part of an enclosure from the first region and the second region.

Abstract: A design rule generating method is provided. The method includes receiving a test pattern, providing a plurality of workflows, which correspond to the test pattern and are preset in relation to a lithography model and a mask generation method, and performing simulation on the test pattern according to a workflow selected from the workflows.

Abstract: A semiconductor device includes a substrate on which a plurality of logic cells are provided, and a plurality of active portions provided on the substrate and extending in a first direction. Contacts and gate structures extend in a second direction intersecting the first direction and are alternately arranged. A common conductive line extends along a boundary region of the plurality of logic cells in the first direction. At least one of the contacts is electrically connected to the common conductive line through a via therebetween, and each of the contacts intersects a plurality of the active portions. End portions of the contacts are aligned with each other along the first direction.

Abstract: A method of forming a pattern includes forming a plurality of target patterns, forming a plurality of pitch violating patterns that make contact with the plurality of target patterns and are disposed between the plurality of target patterns, classifying the plurality of pitch violating patterns into a first region and a second region adjacent to the first region, and forming an initial pattern corresponding to one of the first region and the second region.

Abstract: A method of forming a pattern includes defining a plurality of patterns, defining a plurality of pitch violating patterns that contact the plurality of patterns and correspond to regions between the patterns, classifying the plurality of pitch violating patterns into a first region and a second region that is adjacent to the first region, selecting one of the first region and the second region, and forming an initial pattern defined as the selected first or second region. The selecting includes performing at least one of i) selecting a region that contact dummy patterns, ii) selecting a region of a same kind as one region, and iii) selecting a region that contacts a concave part of an enclosure from the first region and the second region.

Abstract: A pattern matching method for use in manufacturing a semiconductor memory device increases a pattern matching rate between a GDS image and an SEM image. The pattern matching method includes extracting a scanning electron microscope (SEM) image and a graphic data system (GDS) image to perform a pattern matching; performing a two-dimensional Fourier transform (FFT) for the extracted GDS image and analyzing a low spatial frequency; deciding whether or not a pattern is a repeated pattern or non-repeated pattern by using the analyzed low spatial frequency; and limiting an X/Y range for a pattern matching when the decision result is for the repeated pattern, and then performing the pattern matching between the SEM image and the GDS image.

Abstract: A method of forming a pattern includes forming a plurality of target patterns, forming a plurality of pitch violating patterns that make contact with the plurality of target patterns and are disposed between the plurality of target patterns, classifying the plurality of pitch violating patterns into a first region and a second region adjacent to the first region, and forming an initial pattern corresponding to one of the first region and the second region.

Abstract: A pattern matching method for use in manufacturing a semiconductor memory device increases a pattern matching rate between a GDS image and an SEM image. The pattern matching method includes extracting a scanning electron microscope (SEM) image and a graphic data system (GDS) image to perform a pattern matching; performing a two-dimensional furrier transform (FFT) for the extracted GDS image and analyzing a low spatial frequency; deciding whether or not a pattern is a repeated pattern or non-repeated pattern by using the analyzed low spatial frequency; and limiting an X/Y range for a pattern matching when the decision result is for the repeated pattern, and then performing the pattern matching between the SEM image and the GDS image.