Patents by Inventor Hyun Soo Chung
Hyun Soo Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240136331Abstract: A semiconductor package may include a circuit board, an interposer structure on the circuit board, a mold layer, and a first semiconductor chip and a second semiconductor chip spaced apart from each other in a first direction on a center region of the interposer structure and electrically connected to the interposer structure. The interposer structure may include a plurality of trenches in an edge region of the interposer structure and extending through the interposer structure. The mold layer may be in the plurality of trenches and may wrap the first and second semiconductor chips. The mold layer may include a penetrating portion in the plurality of trenches and a stack portion on the interposer structure. A bottom surface of the penetrating portion of the mold layer may be on a same plane as a bottom surface of the interposer structure.Type: ApplicationFiled: October 8, 2023Publication date: April 25, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Hyun Soo CHUNG, Young Lyong KIM
-
Patent number: 11955464Abstract: A semiconductor package including a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip, and a third semiconductor chip disposed on the second semiconductor chip. A first pad is disposed on a top surface of the second semiconductor chip, and includes a first portion and a second portion protruding in a vertical direction from the first portion. A width of the first portion in a first horizontal direction is greater than a width of the second portion in the first horizontal direction. A second pad is disposed on a bottom surface of the third semiconductor chip facing the top surface of the second semiconductor chip, and a solder ball is disposed as surrounding a sidewall of the second portion of the first pad between the first pad and the second pad.Type: GrantFiled: January 4, 2023Date of Patent: April 9, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Myung Kee Chung, Hyun Soo Chung, Tae Won Yoo
-
Publication number: 20240096820Abstract: A method for manufacturing a semiconductor package includes mounting semiconductor chips on an interposer, forming a molding part between the semiconductor chips, surrounding a plurality of bumps between the semiconductor chips and the interposer with a first underfill, forming a sacrificial layer that covers the semiconductor chips, forming a wafer level molding layer that covers the sacrificial layer, performing a planarization process to expose upper sides of the semiconductor chips, form the sacrificial layer into a sacrificial pattern, and form the wafer level molding layer into a wafer level molding pattern, removing the sacrificial pattern, performing a sawing process to remove an outer edge of the semiconductor package, mounting the interposer on a side of a package board, surrounding a plurality of bumps between the package board and the interposer with a second underfill, and attaching a stiffener to an outer portion of the package board.Type: ApplicationFiled: June 13, 2023Publication date: March 21, 2024Inventors: Young Lyong KIM, Hyun Soo CHUNG, In Hyo HWANG
-
Publication number: 20240021575Abstract: A semiconductor package including a buffer structure including a first redistribution layer, a first buffer chip on the first redistribution layer, a second redistribution layer on the first buffer chip, and a first molding layer filling between the first redistribution layer and the second redistribution layer, and a first chip stack and a first semiconductor chip on the buffer structure and spaced apart from each other, wherein the first buffer chip overlaps at least a portion of the first semiconductor chip in a first direction from the buffer structure toward the first semiconductor chip, may be provided.Type: ApplicationFiled: June 26, 2023Publication date: January 18, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Hyun Soo CHUNG, Won-Young KIM
-
Patent number: 11797128Abstract: The present embodiment may provide a touch sensing circuit including: an analog signal processing circuit including one or more adjustable filters configured to receive a touch sensing signal from a touch electrode of a panel and to transmit some of a frequency region of the touch sensing signal; and a touch control circuit configured to determine a change in capacitance of the touch electrode attributable to an object approaching the panel and to transmit a controlling signal to control the adjustable filters of the analog signal processing circuit. The adjustable filter of the present embodiment may include a variable resistor or a variable capacitor. A resistance value or capacitance value of the adjustable filter may be changed in response to the controlling signal, thus changing a frequency pass band of the touch sensing signal.Type: GrantFiled: May 6, 2022Date of Patent: October 24, 2023Assignee: LX SEMICON CO., LTD.Inventors: Kyu Tae Lee, Mun Seok Kang, Jae Hwan Lee, Jeong Kwon Nam, Hyun Soo Chung, Jin Yoon Jang, Hee Ra Yun
-
Patent number: 11768558Abstract: The present disclosure provides a touch sensing circuit comprising an analog signal processing circuit configured to receive a plurality of sensing signals having different frequencies from touch electrodes; and a digital signal processing circuit configured to receive output data of the analog signal processing circuit and perform a discrete Fourier transform. In addition, the present disclosure provides a touch sensing circuit comprising the digital signal processing circuit of the touch sensing circuit that separates the plurality of sensing signals through the discrete Fourier transform and allowing a simultaneous sensing of a finger touch and a stylus pen touch.Type: GrantFiled: December 15, 2021Date of Patent: September 26, 2023Assignee: LX SEMICON CO., LTD.Inventors: Kyu Tae Lee, Mun Seok Kang, Jae Hwan Lee, Jeong Kwon Nam, Hyun Soo Chung, Jin Yoon Jang, Hee Ra Yun, Yeon Ju Yu
-
Patent number: 11705376Abstract: A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.Type: GrantFiled: November 8, 2021Date of Patent: July 18, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Myeong-soon Park, Hyun-Soo Chung, Chan-Ho Lee
-
Patent number: 11586323Abstract: The present disclosure relates to a touch circuit and a touch sensing method. A touch circuit may include a driving circuit configured to transmit a driving signal to a touch electrode, a sensing circuit configured to sense a change in capacitance generated in the touch electrode, and a touch control circuit configured to control a polarity of the driving signal transmitted by the driving circuit. The polarity of the driving signal controlled by the touch control circuit may be determined based on a location of the touch electrode. Touch sensitivity can be improved by differently controlling a polarity of a driving signal transmitted to an adjacent touch electrode.Type: GrantFiled: December 15, 2021Date of Patent: February 21, 2023Assignee: LX Semicon Co., Ltd.Inventors: Jae Hwan Lee, Mun Seok Kang, Jeong Kwon Nam, Kyu Tae Lee, Hyun Soo Chung, Jin Yoon Jang, Hee Ra Yun, Yeon Ju Yu
-
Patent number: 11574892Abstract: A semiconductor package including a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip, and a third semiconductor chip disposed on the second semiconductor chip. A first pad is disposed on a top surface of the second semiconductor chip, and includes a first portion and a second portion protruding in a vertical direction from the first portion. A width of the first portion in a first horizontal direction is greater than a width of the second portion in the first horizontal direction. A second pad is disposed on a bottom surface of the third semiconductor chip facing the top surface of the second semiconductor chip, and a solder ball is disposed as surrounding a sidewall of the second portion of the first pad between the first pad and the second pad.Type: GrantFiled: March 29, 2021Date of Patent: February 7, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Myung Kee Chung, Hyun Soo Chung, Tae Won Yoo
-
Publication number: 20220365654Abstract: The present embodiment may provide a touch sensing circuit including: an analog signal processing circuit including one or more adjustable filters configured to receive a touch sensing signal from a touch electrode of a panel and to transmit some of a frequency region of the touch sensing signal; and a touch control circuit configured to determine a change in capacitance of the touch electrode attributable to an object approaching the panel and to transmit a controlling signal to control the adjustable filters of the analog signal processing circuit. The adjustable filter of the present embodiment may include a variable resistor or a variable capacitor. A resistance value or capacitance value of the adjustable filter may be changed in response to the controlling signal, thus changing a frequency pass band of the touch sensing signal.Type: ApplicationFiled: May 6, 2022Publication date: November 17, 2022Applicant: LX Semicon Co., Ltd.Inventors: Kyu Tae LEE, Mun Seok KANG, Jae Hwan LEE, Jeong Kwon NAM, Hyun Soo CHUNG, Jin Yoon JANG, Hee Ra YUN
-
Publication number: 20220197473Abstract: The present disclosure relates to a touch circuit and a touch sensing method. A touch circuit may include a driving circuit configured to transmit a driving signal to a touch electrode, a sensing circuit configured to sense a change in capacitance generated in the touch electrode, and a touch control circuit configured to control a polarity of the driving signal transmitted by the driving circuit. The polarity of the driving signal controlled by the touch control circuit may be determined based on a location of the touch electrode. Touch sensitivity can be improved by differently controlling a polarity of a driving signal transmitted to an adjacent touch electrode.Type: ApplicationFiled: December 15, 2021Publication date: June 23, 2022Inventors: Jae Hwan Lee, Mun Seok Kang, Jeong Kwon Nam, Kyu Tae Lee, Hyun Soo Chung, Jin Yoon Jang, Hee Ra Yun, Yeon Ju Yu
-
Publication number: 20220197468Abstract: The present disclosure provides a touch sensing circuit comprising an analog signal processing circuit configured to receive a plurality of sensing signals having different frequencies from touch electrodes; and a digital signal processing circuit configured to receive output data of the analog signal processing circuit and perform a discrete Fourier transform. In addition, the present disclosure provides a touch sensing circuit comprising the digital signal processing circuit of the touch sensing circuit that separates the plurality of sensing signals through the discrete Fourier transform and allowing a simultaneous sensing of a finger touch and a stylus pen touch.Type: ApplicationFiled: December 15, 2021Publication date: June 23, 2022Inventors: Kyu Tae Lee, Mun Seok Kang, Jae Hwan Lee, Jeong Kwon Nam, Hyun Soo Chung, Jin Yoon Jang, Hee Ra Yun, Yeon Ju Yu
-
Patent number: 11294524Abstract: The present disclosure provides a technology for mitigating retransmission in a low ground mass (LGM) state and improving the touch sensitivity by not driving two adjacent sensor electrodes simultaneously.Type: GrantFiled: December 15, 2020Date of Patent: April 5, 2022Assignee: SILICON WORKS CO., LTDInventors: Hee Jin Lee, Jae Hwan Lee, Jeong Kwon Nam, Kyu Tae Lee, Hyun Soo Chung, Jin Yoon Jang, Hee Ra Yun, Kyung Min Shin, Mun Seok Kang
-
Publication number: 20220068886Abstract: A semiconductor package including a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip, and a third semiconductor chip disposed on the second semiconductor chip. A first pad is disposed on a top surface of the second semiconductor chip, and includes a first portion and a second portion protruding in a vertical direction from the first portion. A width of the first portion in a first horizontal direction is greater than a width of the second portion in the first horizontal direction. A second pad is disposed on a bottom surface of the third semiconductor chip facing the top surface of the second semiconductor chip, and a solder ball is disposed as surrounding a sidewall of the second portion of the first pad between the first pad and the second pad.Type: ApplicationFiled: March 29, 2021Publication date: March 3, 2022Inventors: MYUNG KEE CHUNG, HYUN SOO CHUNG, TAE WON YOO
-
Publication number: 20220059417Abstract: A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.Type: ApplicationFiled: November 8, 2021Publication date: February 24, 2022Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Myeong-soon PARK, Hyun-Soo Chung, Chan-Ho Lee
-
Patent number: 11189535Abstract: A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.Type: GrantFiled: May 6, 2020Date of Patent: November 30, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Myeong-soon Park, Hyun-Soo Chung, Chan-Ho Lee
-
Publication number: 20210191571Abstract: The present disclosure provides a technology for mitigating retransmission in a low ground mass (LGM) state and improving the touch sensitivity by not driving two adjacent sensor electrodes simultaneously.Type: ApplicationFiled: December 15, 2020Publication date: June 24, 2021Inventors: Hee Jin LEE, Jae Hwan LEE, Jeong Kwon NAM, Kyu Tae LEE, Hyun Soo CHUNG, Jin Yoon JANG, Hee Ra YUN, Kyung Min SHIN, Mun Seok KANG
-
Patent number: 11031347Abstract: A semiconductor package including a heat spreading layer having at least one hole, a first semiconductor chip below the heat spreading layer, a redistribution structure below the first semiconductor chip, a first mold layer between the heat spreading layer and the redistribution structure, a shielding wall extending from the redistribution structure and the heat spreading layer and surrounding the first semiconductor chip, and a first conductive pillar extending from the redistribution structure into the hole may be provided.Type: GrantFiled: April 11, 2019Date of Patent: June 8, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Young-lyong Kim, Hyun-soo Chung, Dong-hyeon Jang
-
Patent number: 11029777Abstract: Disclosed is a touch sensing device for preventing touch sensing performance from being reduced by a parasitic capacitance. The touch sensing device includes a plurality of buffers buffering a difference between a reference signal and a reception signal received from a touch electrode through a touch sensing line and generating first and second currents corresponding to a buffered signal, a plurality of current mirror unit respectively connected to the plurality of buffers, a plurality of filter circuits generating a first filter signal and a second filter signal by removing common noise included in a first output signal output from an nth current mirror unit of the plurality of current mirror units and a second output signal output from an (n?1)th current mirror unit of the plurality of current mirror units, and a plurality of integrators respectively connected to the plurality of filter circuits.Type: GrantFiled: December 18, 2019Date of Patent: June 8, 2021Assignee: SILICON WORKS CO., LTD.Inventors: Hee Jin Lee, Jae Hwan Lee, Jeong Kwon Nam, Kyu Tae Lee, Hyun Soo Chung, Jin Yoon Jang, Hee Ra Yun, Kyung Min Shin, Mun Seok Kang
-
Patent number: D930873Type: GrantFiled: July 19, 2018Date of Patent: September 14, 2021Assignee: LG DISPLAY CO., LTD.Inventors: Hye Cho Shin, Jeong Ho Son, Hyun Soo Chung, Ah Ra Cho, Chi Young Lee, Duck Su Oh, Sung Tae Lee, Ho Geol Lim