Patents by Inventor Hyun-Yong Yu

Hyun-Yong Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230299086
    Abstract: A semiconductor device may include an active pattern on a substrate, a lower channel pattern on the active pattern and including first and second lower semiconductor patterns, an upper channel pattern on the lower channel pattern and including first and second upper semiconductor patterns, a pair of lower source/drain patterns on opposite sides of the lower channel pattern and a pair of upper source/drain patterns on opposite sides of the upper channel pattern, and a gate electrode surrounding the lower and upper channel patterns. The gate electrode may include a first upper portion between the first and second upper semiconductor patterns, and a first lower portion between the first and second lower semiconductor patterns. Each semiconductor pattern may include a first recess part having a first recess region on a top surface thereof, and a first protrusion part protruding from a bottom surface of the first recess part.
    Type: Application
    Filed: September 29, 2022
    Publication date: September 21, 2023
    Applicants: Samsung Electronics Co., Ltd., KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Hyun-Yong YU, Seung Geun JUNG
  • Publication number: 20230112348
    Abstract: A tunneling device includes a first semiconductor portion disposed on a first oxide substrate, a second semiconductor portion disposed on the first semiconductor portion, and an intermediate layer disposed between the first semiconductor portion and second semiconductor portion. The intermediate layer is a natural oxide film obtained by naturally oxidizing one surface of the second semiconductor portion for a predetermined time.
    Type: Application
    Filed: June 7, 2021
    Publication date: April 13, 2023
    Applicant: Korea University Research and Business Foundation
    Inventors: Hyun Yong YU, Kyu Hyun HAN
  • Publication number: 20230013710
    Abstract: A two-dimensional semiconductor transistor includes a gate electrode, a gate insulating layer disposed on the gate electrode, an organic dopant layer disposed on the gate insulating layer and comprising an organic material including electrons, a two-dimensional semiconductor layer disposed on the organic dopant layer, a source electrode disposed on the two-dimensional semiconductor layer, and a drain electrode disposed on the two-dimensional semiconductor layer and spaced apart from the source electrode. A hysteresis of the two-dimensional semiconductor transistor is reduced due to the two-dimensional semiconductor transistor including the organic dopant layer.
    Type: Application
    Filed: June 17, 2020
    Publication date: January 19, 2023
    Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Hyun Yong YU, Kyu Hyun HAN
  • Patent number: 11430889
    Abstract: A semiconductor component is disclosed. The semiconductor component can include: a semiconductor layer injected with a same type of dopant; a gate electrode formed above the semiconductor layer with a gate insulation film positioned in-between; a dielectric layer formed on the semiconductor layer at both sides of the gate electrode; and source/drain electrodes each formed on the dielectric layer.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: August 30, 2022
    Assignee: Korea University Research and Business Foundation
    Inventors: Hyun-Yong Yu, Seung Geun Jung
  • Publication number: 20220271220
    Abstract: The present invention relates to a semiconductor element and a method for manufacturing same, wherein the semiconductor element may comprise: a base element, an intermediate layer formed in at least one direction of the base element; and a metal layer formed on the intermediate layer in a direction opposite to the base element, and wherein a conductive filament may be formed inside the intermediate layer according to the application of a voltage to the intermediate layer.
    Type: Application
    Filed: June 30, 2020
    Publication date: August 25, 2022
    Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Hyun-Yong YU, Seung-Hwan KIM
  • Publication number: 20220093795
    Abstract: A semiconductor device and a method of manufacturing the same. The semiconductor device has a substrate in which recess regions are formed and semiconductor regions acting as a source region or a drain region is defined between the recess regions; a gate insulating layer disposed on an inner surface of each recess region; a recess gate disposed on the gate insulating layer in each recess region; an insulating capping layer disposed above the recess gate in each recess region; a metallic insertion layer disposed between a side surface of the recess gate and a side surface of the insulating capping layer and facing with a side surface of the source region or the drain region; and an intermediate insulating layer disposed between the metallic insertion layer and the recess gate to electrically insulate the metallic insertion layer from the recess gate.
    Type: Application
    Filed: September 21, 2021
    Publication date: March 24, 2022
    Inventors: Hyun-Yong YU, Seung Geun JUNG, Mu Yeong SON
  • Publication number: 20200035830
    Abstract: A semiconductor component is disclosed. The semiconductor component can include: a semiconductor layer injected with a same type of dopant; a gate electrode formed above the semiconductor layer with a gate insulation film positioned in-between; a dielectric layer formed on the semiconductor layer at both sides of the gate electrode; and source/drain electrodes each formed on the dielectric layer.
    Type: Application
    Filed: July 29, 2019
    Publication date: January 30, 2020
    Applicant: Korea University Research and Business Foundation
    Inventors: Hyun-Yong YU, Seung Geun JUNG
  • Patent number: 10312399
    Abstract: A photodiode having a reduced dark current includes a semiconductor layer, a first contact part, a second contact part, and an active region. The first contact part disposed in a first region of the semiconductor layer includes an interlayer and at least one metal layer. The second contact part disposed in a second region of the semiconductor layer includes at least one metal layer. The active region is disposed between the first contact part and the second contact part. The first contact part and the second contact part are arranged asymmetrical to each other.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: June 4, 2019
    Assignees: SK HYNIX INC., KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Hyun-Yong Yu, Hwan-Jun Zang
  • Publication number: 20180254370
    Abstract: A photodiode having a reduced dark current includes a semiconductor layer, a first contact part, a second contact part, and an active region. The first contact part disposed in a first region of the semiconductor layer includes an interlayer and at least one metal layer. The second contact part disposed in a second region of the semiconductor layer includes at least one metal layer. The active region is disposed between the first contact part and the second contact part. The first contact part and the second contact part are arranged asymmetrical to each other.
    Type: Application
    Filed: March 6, 2018
    Publication date: September 6, 2018
    Inventors: Hyun-Yong YU, Hwan-Jun ZANG
  • Patent number: 9646844
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: May 9, 2017
    Assignee: Lam Research Corporation
    Inventors: Qian Fu, Hyun-Yong Yu
  • Publication number: 20160181113
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Application
    Filed: February 26, 2016
    Publication date: June 23, 2016
    Inventors: Qian FU, Hyun-Yong YU
  • Patent number: 9275872
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: March 1, 2016
    Assignee: Lam Research Corporation
    Inventors: Qian Fu, Hyun-Yong Yu
  • Publication number: 20150118853
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Application
    Filed: December 23, 2014
    Publication date: April 30, 2015
    Inventors: Qian FU, Hyun-Yong YU
  • Patent number: 8535549
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The hardmask is removed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: September 17, 2013
    Assignee: Lam Research Corporation
    Inventors: Qian Fu, Ce Qin, Hyun-Yong Yu
  • Patent number: 8329051
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: December 11, 2012
    Assignee: Lam Research Corporation
    Inventors: Qian Fu, Hyun-Yong Yu
  • Publication number: 20120149201
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Application
    Filed: December 14, 2010
    Publication date: June 14, 2012
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Qian Fu, Hyun-Yong Yu
  • Publication number: 20120149203
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The hardmask is removed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Application
    Filed: July 19, 2011
    Publication date: June 14, 2012
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Qian Fu, Ce Qin, Hyun-Yong Yu
  • Patent number: RE46464
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The hardmask is removed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: July 4, 2017
    Assignee: Lam Research Corporation
    Inventors: Qian Fu, Ce Qin, Hyun-Yong Yu