Abstract: A display device can include a gate driver configured to drive gate lines of a panel; a data driver configured to drive data lines of the panel; a timing controller configured to control operations of the gate driver and the data driver; and a level shifter integrated circuit (IC) configured to receive a plurality of control signals from the timing controller, and generate and output a plurality gate control signals for controlling driving of the gate driver, in which the plurality of control signals include an on clock and an off clock, and the level shifter IC stores the on clock and the off clock in buffers based on one or more control signals from the timing controller, generates a plurality of scan clocks by logically processing the on clock and the off clock, and outputs the plurality of scan clocks to the gate driver.

Abstract: Disclosed herein are a display device capable of reducing the number of transmission lines by enabling a master circuit to perform communication with a plurality of slave circuits, which utilize different interfaces, through a common transmission line in a time divisional manner, and an interface method thereof. A timing controller uses a common transmission line of a gamma voltage generator and a level shifter which respectively utilize first and second interfaces and perform communication using the first and second interfaces in a time divisional manner.

Abstract: A display device can include a gate driver configured to drive gate lines of a panel; a data driver configured to drive data lines of the panel; a timing controller configured to control operations of the gate driver and the data driver; and a level shifter integrated circuit (IC) configured to receive a plurality of control signals from the timing controller, and generate and output a plurality gate control signals for controlling driving of the gate driver, in which the plurality of control signals include an on clock and an off clock, and the level shifter IC stores the on clock and the off clock in buffers based on one or more control signals from the timing controller, generates a plurality of scan clocks by logically processing the on clock and the off clock, and outputs the plurality of scan clocks to the gate driver.

Abstract: Disclosed herein are a display device capable of reducing the number of transmission lines by enabling a master circuit to perform communication with a plurality of slave circuits, which utilize different interfaces, through a common transmission line in a time divisional manner, and an interface method thereof. A timing controller uses a common transmission line of a gamma voltage generator and a level shifter which respectively utilize first and second interfaces and perform communication using the first and second interfaces in a time divisional manner.

Abstract: Provided is a battery cell balancing circuit including: a battery cell module including a plurality of battery cells connected in series; a series resonant circuit including an inductor unit and a capacitor unit which are connected in series so as to store electric energy recovered from a corresponding battery cell of the battery cell module and supply the stored electric energy to a corresponding battery cell of the battery cell module; and a switch unit configured to provide an electric energy recovery path for storing the electric energy recovered from the corresponding battery cell of the battery cell module into the capacitor unit of the series resonant circuit and provide an electric energy supply path for supplying the stored electric energy to the corresponding battery cell of the battery cell module.

Abstract: Provided is a battery cell balancing circuit including: a battery cell module including a plurality of battery cells connected in series; a series resonant circuit including an inductor unit and a capacitor unit which are connected in series so as to store electric energy recovered from a corresponding battery cell of the battery cell module and supply the stored electric energy to a corresponding battery cell of the battery cell module; and a switch unit configured to provide an electric energy recovery path for storing the electric energy recovered from the corresponding battery cell of the battery cell module into the capacitor unit of the series resonant circuit and provide an electric energy supply path for supplying the stored electric energy to the corresponding battery cell of the battery cell module.

Abstract: Disclosed herein are a DC-DC boost converter circuit, which is capable of preventing power loss and stabilizing switching elements by implementing soft switching and improving efficiency by adding a charge pumping function, and a method for driving the same. The DC-DC boost converter circuit, in which an inductor and an output diode are connected in series and an output capacitor and a load are connected to an output port of the output diode in parallel, includes an output stabilization circuit in which first and second switching elements, a transformer, a plurality of boost capacitors, and a plurality of diodes are connected in series/parallel between the inductor and the output diode.

Abstract: Disclosed herein are a DC-DC boost converter circuit, which is capable of preventing power loss and stabilizing switching elements by implementing soft switching and improving efficiency by adding a charge pumping function, and a method for driving the same. The DC-DC boost converter circuit, in which an inductor and an output diode are connected in series and an output capacitor and a load are connected to an output port of the output diode in parallel, includes an output stabilization circuit in which first and second switching elements, a transformer, a plurality of boost capacitors, and a plurality of diodes are connected in series/parallel between the inductor and the output diode.