Patents by Inventor Hyun Wook HAN

Hyun Wook HAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967950
    Abstract: A semiconductor circuit includes a first pad, a second pad, swapping circuit, and an internal circuit. The internal circuit receives a first external signal and a second external signal, and generates a first internal signal and a second internal signal. Based on master information and swapping information, the swapping circuit couples the internal circuit to one of first and second pads to provide a path through which the first internal signal is output and a path through which the first external signal is received, and couples the internal circuit to the other of the first and second pads to provide a path through which the second internal signal is output and a path through which the second external signal is received.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: April 23, 2024
    Assignee: SK hynix Inc.
    Inventors: Hyun Wook Han, Min Chang Kim
  • Patent number: 11658645
    Abstract: A duty correction device includes a global duty correction circuit and a local duty correction circuit. The global duty correction circuit performs a global duty correction operation on a first clock signal and a second clock signal based on a local correction signal. The local duty correction circuit performs a local duty correction by detecting phases of the first and second clock signals, and enables the local correction signal when a number of the local duty correction operation reaches a threshold value.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: May 23, 2023
    Assignee: SK hynix Inc.
    Inventor: Hyun Wook Han
  • Publication number: 20230039697
    Abstract: A semiconductor circuit includes a first pad, a second pad, swapping circuit, and an internal circuit. The internal circuit receives a first external signal and a second external signal, and generates a first internal signal and a second internal signal. Based on master information and swapping information, the swapping circuit couples the internal circuit to one of first and second pads to provide a path through which the first internal signal is output and a path through which the first external signal is received, and couples the internal circuit to the other of the first and second pads to provide a path through which the second internal signal is output and a path through which the second external signal is received.
    Type: Application
    Filed: March 2, 2022
    Publication date: February 9, 2023
    Applicant: SK hynix Inc.
    Inventors: Hyun Wook HAN, Min Chang KIM
  • Publication number: 20220337228
    Abstract: A duty correction device includes a global duty correction circuit and a local duty correction circuit. The global duty correction circuit performs a global duty correction operation on a first clock signal and a second clock signal based on a local correction signal. The local duty correction circuit performs a local duty correction by detecting phases of the first and second clock signals, and enables the local correction signal when a number of the local duty correction operation reaches a threshold value.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 20, 2022
    Applicant: SK hynix Inc.
    Inventor: Hyun Wook HAN
  • Patent number: 11424735
    Abstract: A duty correction device includes a global duty correction circuit and a local duty correction circuit. The global duty correction circuit performs a global duty correction operation on a first clock signal and a second clock signal based on a local correction signal. The local duty correction circuit performs a local duty correction by detecting phases of the first and second clock signals, and enables the local correction signal when a number of the local duty correction operation reaches a threshold value.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: August 23, 2022
    Assignee: SK hynix Inc.
    Inventor: Hyun Wook Han
  • Publication number: 20220109434
    Abstract: A duty correction device includes a global duty correction circuit and a local duty correction circuit. The global duty correction circuit performs a global duty correction operation on a first clock signal and a second clock signal based on a local correction signal. The local duty correction circuit performs a local duty correction by detecting phases of the first and second clock signals, and enables the local correction signal when a number of the local duty correction operation reaches a threshold value.
    Type: Application
    Filed: February 11, 2021
    Publication date: April 7, 2022
    Applicant: SK hynix Inc.
    Inventor: Hyun Wook HAN
  • Publication number: 20210057110
    Abstract: A disease network construction method includes the steps of: (1) organizing cohort data in time series; (2) stratifying or grouping the data organized in step (1) by confounding variables; (3) deriving a correlation of diseases within the stratification in step (2); and (4) constructing a disease network on the basis of the correlation derived in step (3). According to the present invention, a disease may be influenced by a variety of clinical and medical confounding variables such as age, gender, race, socioeconomic variables, and regional and national health care systems, and thus a method for more reliably deriving a correlation between diseases may be provided.
    Type: Application
    Filed: May 2, 2019
    Publication date: February 25, 2021
    Inventors: Hyun Wook HAN, Jong Man YU, Dong Hyun LEE, Ho YUN, Tae Sun HWANG, Chaewon LEE, Kanghyun KIM, Sangmin NAM
  • Patent number: 9679621
    Abstract: A semiconductor system may include a first semiconductor device configured to output commands, addresses and data. The semiconductor system may include a second semiconductor device configured to convert a logic level combination of the data when only any one of bits of the data is a different logic level, and store the data in response to the commands and the addresses, in a write operation.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: June 13, 2017
    Assignee: SK hynix Inc.
    Inventors: Min Soo Park, Jin Se Kim, Moon Yub Na, Min Jun Choi, Hyun Wook Han
  • Publication number: 20170117023
    Abstract: A semiconductor system may include a first semiconductor device configured to output commands, addresses and data. The semiconductor system may include a second semiconductor device configured to convert a logic level combination of the data when only any one of bits of the data is a different logic level, and store the data in response to the commands and the addresses, in a write operation.
    Type: Application
    Filed: February 8, 2016
    Publication date: April 27, 2017
    Inventors: Min Soo PARK, Jin Se KIM, Moon Yub NA, Min Jun CHOI, Hyun Wook HAN