Abstract: A photographing lens assembly includes at least four lens elements that are, in order from an object side to an image side along an optical path, a first lens element, a second lens element, at least one subsequent lens element and a last lens element that is closest to an image surface. Each of the at least four lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. At least one surface among lens surfaces from the image-side surface of the second lens element to the object-side surface of the last lens element is a metasurface having a subwavelength microstructure.

Abstract: Described herein are ferroelectric (FE) memory cells that include transistors having gate stacks separate from FE capacitors of these cells. An example memory cell may be implemented as an IC device that includes a support structure (e.g., a substrate) and a transistor provided over the support structure and including a gate stack. The IC device also includes a FE capacitor having a first capacitor electrode, a second capacitor electrode, and a capacitor insulator of a FE material between the first capacitor electrode and the second capacitor electrode, where the FE capacitor is separate from the gate stack (i.e., is not integrated within the gate stack and does not have any layers that are part of the gate stack). The IC device further includes an interconnect structure, configured to electrically couple the gate stack and the first capacitor electrode.

Abstract: An electronic device is disclosed. The electronic device includes a substrate, a plurality of color filters disposed on the substrate, an optical film disposed on the plurality of color filter, and a defect disposed between the substrate and the optical film. The optical film has a first base, a protective layer on the first base, and a second base between the first base and the protective layer and having a first processed area. In a top view of the electronic device, the first processed area corresponds to the defect and at least partially overlaps at least two color filters.

Abstract: Provided are a semiconductor device and a method for manufacturing the same, and a semiconductor package. The semiconductor device includes a die stack and a cap substrate. The die stack includes a first die, second dies stacked on the first die, and a third die stacked on the second dies. The first die includes first through semiconductor vias. Each of the second dies include second through semiconductor vias. The third die includes third through semiconductor vias. The cap substrate is disposed on the third die of the die stack. A sum of a thickness of the third die and a thickness of the cap substrate ranges from about 50 ?m to about 80 ?m.

Abstract: A BLDC motor driver circuit includes: a driving power stage circuit configured to provide a start-up test signal in a start-up mode to excite a BLDC motor, to drive a rotor of the BLDC motor to rotate for a test; a current unidirectional circuit coupled to the BLDC motor at a reverse end for detecting a BEMF, to generate a detection signal at a forward end of the current unidirectional circuit, wherein when a voltage at the reverse end exceeds a voltage at the forward end, the current unidirectional circuit limits the voltage at the forward end not to be higher than a clamp voltage; a biasing circuit for biasing the current unidirectional circuit in a forward operation state and for providing the clamp voltage; and a sensor circuit for generating a sensing signal according to the detection signal to indicate a test rotation state of the BLDC motor.

Abstract: A BLDC motor driver circuit includes: a driving power stage circuit configured to provide a start-up test signal in a start-up mode to excite a BLDC motor, to drive a rotor of the BLDC motor to rotate for a test; a current unidirectional circuit coupled to the BLDC motor at a reverse end for detecting a BEMF, to generate a detection signal at a forward end of the current unidirectional circuit, wherein when a voltage at the reverse end exceeds a voltage at the forward end, the current unidirectional circuit limits the voltage at the forward end not to be higher than a clamp voltage; a biasing circuit for biasing the current unidirectional circuit in a forward operation state and for providing the clamp voltage; and a sensor circuit for generating a sensing signal according to the detection signal to indicate a test rotation state of the BLDC motor.

Abstract: A gain controlling system, a sound playback system, and a gain controlling method thereof are disclosed. The gain controlling system includes a main gain control unit, a sub gain control unit, and a logic control unit. The main gain control unit has a first step-by-step adjusting magnitude; the sub gain control unit has a second step-by-step adjusting magnitude; wherein the second step-by-step adjusting magnitude is smaller than the first step-by-step adjusting magnitude. The logic control unit is used for controlling the main and the sub gain control unit to transform an analog signal into a converted signal according to an adjustment command signal and further determining whether an adjusting magnitude required by the adjustment command signal is larger than a maximum gain range of the sub gain control unit. If yes, the logic control unit controls the main control unit and the sub gain control unit repeatedly.

Abstract: A gain controlling system, a sound playback system, and a gain controlling method thereof are disclosed. The gain controlling system includes a main gain control unit, a sub gain control unit, and a logic control unit. The main gain control unit has a first step-by-step adjusting magnitude; the sub gain control unit has a second step-by-step adjusting magnitude; wherein the second step-by-step adjusting magnitude is smaller than the first step-by-step adjusting magnitude. The logic control unit is used for controlling the main and the sub gain control unit to transform an analog signal into a converted signal according to an adjustment command signal and further determining whether an adjusting magnitude required by the adjustment command signal is larger than a maximum gain range of the sub gain control unit. If yes, the logic control unit controls the main control unit and the sub gain control unit repeatedly.