Patents by Inventor I-Chun CHENG

I-Chun CHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor structure with extended contact structure
    Patent number: 11923413
    Abstract: Semiconductor structures are provided. The semiconductor structure includes a substrate and nanostructures formed over the substrate. The semiconductor structure further includes a gate structure surrounding the nanostructures and a source/drain structure attached to the nanostructures. The semiconductor structure further includes a contact formed over the source/drain structure and extending into the source/drain structure.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ta-Chun Lin, Kuo-Hua Pan, Jhon-Jhy Liaw, Chao-Ching Cheng, Hung-Li Chiang, Shih-Syuan Huang, Tzu-Chiang Chen, I-Sheng Chen, Sai-Hooi Yeong
  • Apparatus and method for treating graphene using plasma and application thereof
    Patent number: 9908779
    Abstract: A method and apparatus for treating graphene raw material by plasma, and an application thereof are provided. After treated by the plasma, the graphene raw material will have a special structure and characteristic.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: March 6, 2018
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: I-Chun Cheng, Jian-Zhang Chen, Cheng-Che Hsu, Pi-Tai Chou, Hsiao-Wei Liu, Haoming Chang, Sheng-Ping Liang, Ting-Jui Wu
  • Memory cell with functions of storage element and selector
    Patent number: 9786842
    Abstract: A single memory cell has the functions of a storage element and a selector. The memory cell includes a P-type layer, a tunneling structure and an N-type layer. The tunneling structure is formed on the P-type layer. The N-type layer is formed on the tunneling structure. The tunneling structure is a stack structure including a first material layer, a second material layer and a third material layer. By adjusting a bias voltage that is applied to the P-type layer and the N-type layer, the tunneling structure is controlled to be in the amorphous state or the crystalline state. Consequently, the memory cell has the memorizing and storing functions. The memory cell has the P-type layer, the tunneling structure and the N-type layer. By adjusting the bias voltage, the function of the selector is achieved.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: October 10, 2017
    Assignee: OPTO TECH CORPORATION
    Inventors: Ming-Yi Yan, Jhih-You Lu, Hsien-Chih Huang, Yun-Shiuan Li, Jiun-Yun Li, I-Chun Cheng, Chih-Ming Lai, Yue-Lin Huang, Lung-Han Peng
  • Anti-reflection structure and electronic device
    Patent number: 9690012
    Abstract: An anti-reflection structure includes a substrate including a planar portion, a protrusion portion disposed over the planar portion, and a coating layer, wherein the protrusion portion is integrated with the planar portion, and the coating layer conformably covers the planar portion and the protrusion portion.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: June 27, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Tai-Nien Ko, I-Chun Cheng, Po-Yuan Chen, Yun-Shiuan Li, Chia-Yun Chou
  • PHOTOCONDUCTIVE LAYER WITH ADJUSTABLE ELECTRICAL PROPERTY
    Publication number: 20160357108
    Abstract: A photoconductive layer with electrical property adjustable via control of intensity or location of illumination by a light source is provided. The photoconductive layer has at least one charge generation material and at least one binder for distributing the charge generation material within the body of the layer. The localized change of electrical property in the photoconductive layer arises on and beneath the surface area of the layer illuminated by the light source via actuated bulk change in electrical charge contributed by the charge generation material in the area.
    Type: Application
    Filed: December 7, 2015
    Publication date: December 8, 2016
    Inventors: Yu-Hsiang HSU, Jen Tau Gu, Shih-Jue LIN, Hsin-Hu WANG, Ting-Jui WU, I-Chun CHENG, Cheng-che HSU, Jian-Zhang CHEN, Tsun-Hsu CHEN, Chih-Kung LEE
  • ANTI-REFLECTION STRUCTURE AND ELECTRONIC DEVICE
    Publication number: 20160041309
    Abstract: An anti-reflection structure includes a substrate including a planar portion, a protrusion portion disposed over the planar portion, and a coating layer, wherein the protrusion portion is integrated with the planar portion, and the coating layer conformably covers the planar portion and the protrusion portion.
    Type: Application
    Filed: August 4, 2015
    Publication date: February 11, 2016
    Inventors: Tai-Nien KO, I-Chun CHENG, Po-Yuan CHEN, Yun-Shiuan LI, Chia-Yun CHOU
  • METHOD FOR PREPARING METAL FROM METAL PRECURSOR SOLUTION AND THE APPLICATION THEREOF
    Publication number: 20150322573
    Abstract: Method for preparing metal from metal precursor solution and the application thereof are provided. The metal precursor solution is treated by atmospheric pressure plasma jet (APPJ) and therefore transform into the metal.
    Type: Application
    Filed: December 5, 2014
    Publication date: November 12, 2015
    Inventors: I-Chun Cheng, Jian-Zhang Chen, Cheng-Che Hsu, Haoming Chang, Hsiao-Wei Liu, Chia-Yun Chou, Ting-Jui Wu
  • APPARATUS AND METHOD FOR TREATING GRAPHENE USING PLASMA AND APPLICATION THEREOF
    Publication number: 20150315026
    Abstract: A method and apparatus for treating graphene raw material by plasma, and an application thereof are provided. After treated by the plasma, the graphene raw material will have a special structure and characteristic.
    Type: Application
    Filed: April 30, 2015
    Publication date: November 5, 2015
    Inventors: I-Chun CHENG, Jian-Zhang CHEN, Cheng-Che HSU, Pi-Tai CHOU, Hsiao-Wei LIU, Haoming CHANG, Sheng-Ping LIANG, Ting-Jui WU