Patents by Inventor I-Chun Fang
I-Chun Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240118914Abstract: An L2 virtual machine (VM) operating in a trust domain invokes a memory operation involving a virtual I/O device passed through from an L1 VM. Invocation of the memory operation causes an L2 virtual I/O device driver to make a hypercall to a trust domain management module. The hypercall comprises a memory-mapped I/O (MMIO) address of the virtual I/O device as seen by the L2 VM (L2 MMIO address), which matches the MMIO address of the virtual I/O device as seen by the L1 VM. The module passes hypercall information to an LO hypervisor, which forwards the information to an emulator operating in LO user space that emulates the back end of the virtual I/O device operating on the L1 VM. The emulator determines an emulated software response based on the L2 MMIO address and the memory operation is carried out.Type: ApplicationFiled: December 19, 2023Publication date: April 11, 2024Inventors: Chuanxiao Dong, I-Chun Fang, Yanting Jiang
-
Publication number: 20240078014Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.Type: ApplicationFiled: October 23, 2023Publication date: March 7, 2024Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
-
Patent number: 11803306Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.Type: GrantFiled: April 21, 2021Date of Patent: October 31, 2023Assignee: Hewlett Packard Enterprise Development LPInventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
-
Patent number: 11513836Abstract: Dynamic scheduling is disclosed. A plurality of physical nodes is included in a computer system. Each node includes a plurality of processors. Each processor includes a plurality of hyperthreads. In response to receiving an indication of an event occurring, a search is performed for a queue in a set of queues on which to place a virtual processor that had been waiting on the event. Queues in the set of queues correspond to hyperthreads in a physical node in the plurality of physical nodes. The queues in the set of queues are visited according to a predetermined traversal order.Type: GrantFiled: January 9, 2020Date of Patent: November 29, 2022Assignee: TidalScale, Inc.Inventors: Isaac R. Nassi, Mark Hill, I-Chun Fang, Kleoni Ioannidou
-
Publication number: 20210240356Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.Type: ApplicationFiled: April 21, 2021Publication date: August 5, 2021Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
-
Patent number: 11023135Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.Type: GrantFiled: June 26, 2018Date of Patent: June 1, 2021Assignee: TidalScale, Inc.Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
-
Patent number: 10783000Abstract: Associating working sets and threads is disclosed. An indication of a stalling event is received. In response to receiving the indication of the stalling event, a state of a processor associated with the stalling event is saved. At least one of an identifier of a guest thread running in the processor and a guest physical address referenced by the processor is obtained from the saved processor state.Type: GrantFiled: May 8, 2019Date of Patent: September 22, 2020Assignee: TidalScale, Inc.Inventors: Isaac R. Nassi, Kleoni Ioannidou, David P. Reed, I-Chun Fang, Michael Berman, Mark Hill, Brian Moffet
-
Publication number: 20200142733Abstract: Dynamic scheduling is disclosed. A plurality of physical nodes is included in a computer system. Each node includes a plurality of processors. Each processor includes a plurality of hyperthreads. In response to receiving an indication of an event occurring, a search is performed for a queue in a set of queues on which to place a virtual processor that had been waiting on the event. Queues in the set of queues correspond to hyperthreads in a physical node in the plurality of physical nodes. The queues in the set of queues are visited according to a predetermined traversal order.Type: ApplicationFiled: January 9, 2020Publication date: May 7, 2020Inventors: Isaac R. Nassi, Mark Hill, I-Chun Fang, Kleoni Ioannidou
-
Patent number: 10579421Abstract: Dynamic scheduling is disclosed. A plurality of physical nodes is included in a computer system. Each node includes a plurality of processors. Each processor includes a plurality of hyperthreads. In response to receiving an indication of an event occurring, a search is performed for a queue in a set of queues on which to place a virtual processor that had been waiting on the event. Queues in the set of queues correspond to hyperthreads in a physical node in the plurality of physical nodes. The queues in the set of queues are visited according to a predetermined traversal order.Type: GrantFiled: August 25, 2017Date of Patent: March 3, 2020Assignee: TidalScale, Inc.Inventors: Isaac R. Nassi, Mark Hill, I-Chun Fang, Kleoni Ioannidou
-
Publication number: 20190361735Abstract: Associating working sets and threads is disclosed. An indication of a stalling event is received. In response to receiving the indication of the stalling event, a state of a processor associated with the stalling event is saved. At least one of an identifier of a guest thread running in the processor and a guest physical address referenced by the processor is obtained from the saved processor state.Type: ApplicationFiled: May 8, 2019Publication date: November 28, 2019Inventors: Isaac R. Nassi, Kleoni Ioannidou, David P. Reed, I-Chun Fang, Michael Berman, Mark Hill, Brian Moffet
-
Patent number: 10353736Abstract: Associating working sets and threads is disclosed. An indication of a stalling event is received. In response to receiving the indication of the stalling event, a state of a processor associated with the stalling event is saved. At least one of an identifier of a guest thread running in the processor and a guest physical address referenced by the processor is obtained from the saved processor state.Type: GrantFiled: August 25, 2017Date of Patent: July 16, 2019Assignee: TidalScale, Inc.Inventors: Isaac R. Nassi, Kleoni Ioannidou, David P. Reed, I-Chun Fang, Michael Berman, Mark Hill, Brian Moffet
-
Publication number: 20180373441Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.Type: ApplicationFiled: June 26, 2018Publication date: December 27, 2018Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
-
Publication number: 20180060071Abstract: Associating working sets and threads is disclosed. An indication of a stalling event is received. In response to receiving the indication of the stalling event, a state of a processor associated with the stalling event is saved. At least one of an identifier of a guest thread running in the processor and a guest physical address referenced by the processor is obtained from the saved processor state.Type: ApplicationFiled: August 25, 2017Publication date: March 1, 2018Inventors: Isaac R. Nassi, Kleoni Ioannidou, David P. Reed, I-Chun Fang, Michael Berman, Mark Hill, Brian Moffet
-
Publication number: 20180060121Abstract: Dynamic scheduling is disclosed. A plurality of physical nodes is included in a computer system. Each node includes a plurality of processors. Each processor includes a plurality of hyperthreads. In response to receiving an indication of an event occurring, a search is performed for a queue in a set of queues on which to place a virtual processor that had been waiting on the event. Queues in the set of queues correspond to hyperthreads in a physical node in the plurality of physical nodes. The queues in the set of queues are visited according to a predetermined traversal order.Type: ApplicationFiled: August 25, 2017Publication date: March 1, 2018Inventors: Isaac R. Nassi, Mark Hill, I-Chun Fang, Kleoni Ioannidou
-
Patent number: 9525995Abstract: Apparatuses, systems, and methods for user equipment (UE) devices to perform a radio access technology (RAT) upgrade. A UE may initiate a background scan to upgrade RAT while camped on a first system in response to an occurrence of a first condition. The first system may include a first PLMN that operates according a first RAT. The UE may determine a second system operates according to a second RAT that provides upgraded service as compared to the first RAT. The second system may be included in one or more systems found during the background scan. The UE may attempt to register on the second system based on the second PLMN operating according to the second RAT. The first and second PLMNs may each have an associated operator preference and the first PLMN may be preferred over the second PLMN.Type: GrantFiled: June 7, 2015Date of Patent: December 20, 2016Assignee: Apple Inc.Inventors: Emmanuel Grenier-Raud, Gaurav Khanna, Harshit Chuttani, I-Chun Fang, Thanigaivelu Elangovan, Yifan Zhu, Rajesh Ambati, Lakshmi N. Kavuri, Gaurav Arya, Sindhu Sivasankaran Nair, Madhusudan Chaudhary
-
Publication number: 20160330606Abstract: Apparatuses, systems, and methods for user equipment (UE) devices to perform a radio access technology (RAT) upgrade. A UE may initiate a background scan to upgrade RAT while camped on a first system in response to an occurrence of a first condition. The first system may include a first PLMN that operates according a first RAT. The UE may determine a second system operates according to a second RAT that provides upgraded service as compared to the first RAT. The second system may be included in one or more systems found during the background scan. The UE may attempt to register on the second system based on the second PLMN operating according to the second RAT. The first and second PLMNs may each have an associated operator preference and the first PLMN may be preferred over the second PLMN.Type: ApplicationFiled: June 7, 2015Publication date: November 10, 2016Inventors: Emmanuel Grenier-Raud, Gaurav Khanna, Harshit Chuttani, I-Chun Fang, Thanigaivelu Elangovan, Yifan Zhu, Rajesh Ambati, Lakshmi N. Kavuri, Gaurav Arya, Sindhu Sivasankaran Nair, Madhusudan Chaudhary