Patents by Inventor I-Chun Fang

I-Chun Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240118914
    Abstract: An L2 virtual machine (VM) operating in a trust domain invokes a memory operation involving a virtual I/O device passed through from an L1 VM. Invocation of the memory operation causes an L2 virtual I/O device driver to make a hypercall to a trust domain management module. The hypercall comprises a memory-mapped I/O (MMIO) address of the virtual I/O device as seen by the L2 VM (L2 MMIO address), which matches the MMIO address of the virtual I/O device as seen by the L1 VM. The module passes hypercall information to an LO hypervisor, which forwards the information to an emulator operating in LO user space that emulates the back end of the virtual I/O device operating on the L1 VM. The emulator determines an emulated software response based on the L2 MMIO address and the memory operation is carried out.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Chuanxiao Dong, I-Chun Fang, Yanting Jiang
  • Publication number: 20240078014
    Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.
    Type: Application
    Filed: October 23, 2023
    Publication date: March 7, 2024
    Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
  • Patent number: 11803306
    Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: October 31, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
  • Patent number: 11513836
    Abstract: Dynamic scheduling is disclosed. A plurality of physical nodes is included in a computer system. Each node includes a plurality of processors. Each processor includes a plurality of hyperthreads. In response to receiving an indication of an event occurring, a search is performed for a queue in a set of queues on which to place a virtual processor that had been waiting on the event. Queues in the set of queues correspond to hyperthreads in a physical node in the plurality of physical nodes. The queues in the set of queues are visited according to a predetermined traversal order.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: November 29, 2022
    Assignee: TidalScale, Inc.
    Inventors: Isaac R. Nassi, Mark Hill, I-Chun Fang, Kleoni Ioannidou
  • Publication number: 20210240356
    Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 5, 2021
    Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
  • Patent number: 11023135
    Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: June 1, 2021
    Assignee: TidalScale, Inc.
    Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
  • Patent number: 10783000
    Abstract: Associating working sets and threads is disclosed. An indication of a stalling event is received. In response to receiving the indication of the stalling event, a state of a processor associated with the stalling event is saved. At least one of an identifier of a guest thread running in the processor and a guest physical address referenced by the processor is obtained from the saved processor state.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: September 22, 2020
    Assignee: TidalScale, Inc.
    Inventors: Isaac R. Nassi, Kleoni Ioannidou, David P. Reed, I-Chun Fang, Michael Berman, Mark Hill, Brian Moffet
  • Publication number: 20200142733
    Abstract: Dynamic scheduling is disclosed. A plurality of physical nodes is included in a computer system. Each node includes a plurality of processors. Each processor includes a plurality of hyperthreads. In response to receiving an indication of an event occurring, a search is performed for a queue in a set of queues on which to place a virtual processor that had been waiting on the event. Queues in the set of queues correspond to hyperthreads in a physical node in the plurality of physical nodes. The queues in the set of queues are visited according to a predetermined traversal order.
    Type: Application
    Filed: January 9, 2020
    Publication date: May 7, 2020
    Inventors: Isaac R. Nassi, Mark Hill, I-Chun Fang, Kleoni Ioannidou
  • Patent number: 10579421
    Abstract: Dynamic scheduling is disclosed. A plurality of physical nodes is included in a computer system. Each node includes a plurality of processors. Each processor includes a plurality of hyperthreads. In response to receiving an indication of an event occurring, a search is performed for a queue in a set of queues on which to place a virtual processor that had been waiting on the event. Queues in the set of queues correspond to hyperthreads in a physical node in the plurality of physical nodes. The queues in the set of queues are visited according to a predetermined traversal order.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: March 3, 2020
    Assignee: TidalScale, Inc.
    Inventors: Isaac R. Nassi, Mark Hill, I-Chun Fang, Kleoni Ioannidou
  • Publication number: 20190361735
    Abstract: Associating working sets and threads is disclosed. An indication of a stalling event is received. In response to receiving the indication of the stalling event, a state of a processor associated with the stalling event is saved. At least one of an identifier of a guest thread running in the processor and a guest physical address referenced by the processor is obtained from the saved processor state.
    Type: Application
    Filed: May 8, 2019
    Publication date: November 28, 2019
    Inventors: Isaac R. Nassi, Kleoni Ioannidou, David P. Reed, I-Chun Fang, Michael Berman, Mark Hill, Brian Moffet
  • Patent number: 10353736
    Abstract: Associating working sets and threads is disclosed. An indication of a stalling event is received. In response to receiving the indication of the stalling event, a state of a processor associated with the stalling event is saved. At least one of an identifier of a guest thread running in the processor and a guest physical address referenced by the processor is obtained from the saved processor state.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: July 16, 2019
    Assignee: TidalScale, Inc.
    Inventors: Isaac R. Nassi, Kleoni Ioannidou, David P. Reed, I-Chun Fang, Michael Berman, Mark Hill, Brian Moffet
  • Publication number: 20180373441
    Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.
    Type: Application
    Filed: June 26, 2018
    Publication date: December 27, 2018
    Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
  • Publication number: 20180060071
    Abstract: Associating working sets and threads is disclosed. An indication of a stalling event is received. In response to receiving the indication of the stalling event, a state of a processor associated with the stalling event is saved. At least one of an identifier of a guest thread running in the processor and a guest physical address referenced by the processor is obtained from the saved processor state.
    Type: Application
    Filed: August 25, 2017
    Publication date: March 1, 2018
    Inventors: Isaac R. Nassi, Kleoni Ioannidou, David P. Reed, I-Chun Fang, Michael Berman, Mark Hill, Brian Moffet
  • Publication number: 20180060121
    Abstract: Dynamic scheduling is disclosed. A plurality of physical nodes is included in a computer system. Each node includes a plurality of processors. Each processor includes a plurality of hyperthreads. In response to receiving an indication of an event occurring, a search is performed for a queue in a set of queues on which to place a virtual processor that had been waiting on the event. Queues in the set of queues correspond to hyperthreads in a physical node in the plurality of physical nodes. The queues in the set of queues are visited according to a predetermined traversal order.
    Type: Application
    Filed: August 25, 2017
    Publication date: March 1, 2018
    Inventors: Isaac R. Nassi, Mark Hill, I-Chun Fang, Kleoni Ioannidou
  • Patent number: 9525995
    Abstract: Apparatuses, systems, and methods for user equipment (UE) devices to perform a radio access technology (RAT) upgrade. A UE may initiate a background scan to upgrade RAT while camped on a first system in response to an occurrence of a first condition. The first system may include a first PLMN that operates according a first RAT. The UE may determine a second system operates according to a second RAT that provides upgraded service as compared to the first RAT. The second system may be included in one or more systems found during the background scan. The UE may attempt to register on the second system based on the second PLMN operating according to the second RAT. The first and second PLMNs may each have an associated operator preference and the first PLMN may be preferred over the second PLMN.
    Type: Grant
    Filed: June 7, 2015
    Date of Patent: December 20, 2016
    Assignee: Apple Inc.
    Inventors: Emmanuel Grenier-Raud, Gaurav Khanna, Harshit Chuttani, I-Chun Fang, Thanigaivelu Elangovan, Yifan Zhu, Rajesh Ambati, Lakshmi N. Kavuri, Gaurav Arya, Sindhu Sivasankaran Nair, Madhusudan Chaudhary
  • Publication number: 20160330606
    Abstract: Apparatuses, systems, and methods for user equipment (UE) devices to perform a radio access technology (RAT) upgrade. A UE may initiate a background scan to upgrade RAT while camped on a first system in response to an occurrence of a first condition. The first system may include a first PLMN that operates according a first RAT. The UE may determine a second system operates according to a second RAT that provides upgraded service as compared to the first RAT. The second system may be included in one or more systems found during the background scan. The UE may attempt to register on the second system based on the second PLMN operating according to the second RAT. The first and second PLMNs may each have an associated operator preference and the first PLMN may be preferred over the second PLMN.
    Type: Application
    Filed: June 7, 2015
    Publication date: November 10, 2016
    Inventors: Emmanuel Grenier-Raud, Gaurav Khanna, Harshit Chuttani, I-Chun Fang, Thanigaivelu Elangovan, Yifan Zhu, Rajesh Ambati, Lakshmi N. Kavuri, Gaurav Arya, Sindhu Sivasankaran Nair, Madhusudan Chaudhary