Patents by Inventor I-Hsin Chen

I-Hsin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087915
    Abstract: A bonding tool includes a gas supply line that may extend directly between valves associated with one or more gas supply tanks and a processing chamber such that gas supply line is uninterrupted without any intervening valves or other types of structures that might otherwise cause a pressure buildup in the gas supply line between the processing chamber and the valves associated with the one or more gas supply tanks. The pressure in the gas supply line may be maintained at or near the pressure in the processing chamber so that gas provided to the processing chamber through the gas supply line does not cause a pressure imbalance in the processing chamber, which might otherwise cause early or premature contact between semiconductor substrates that are to be bonded in the processing chamber.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Yen-Hao HUANG, Chun-Yi CHEN, I-Shi WANG, Yin-Tun CHOU, Yuan-Hsin CHI, Sheng-Yuan LIN
  • Patent number: 11647592
    Abstract: A system for effectively curing dry film ink throughout its thickness on circuit boards being made applies an exposure system, a circuit board, and a method for making the circuit board. The exposure system includes a plurality of mixed light sources with different wavelengths within a range of 365 nm to 440 nm, the mixed light sources can output at least three different wavelengths of light each of substantially a single wavelength and a fourth source of light able to output light of a spectrum of wavelengths, the ranges of light being between 365 nm and 440 nm.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: May 9, 2023
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Ching-Lung Chuang, I-Hsin Chen, Li-Jen Chang
  • Publication number: 20220312599
    Abstract: A system for effectively curing dry film ink throughout its thickness on circuit boards being made applies an exposure system, a circuit board, and a method for making the circuit board. The exposure system includes a plurality of mixed light sources with different wavelengths within a range of 365 nm to 440 nm, the mixed light sources can output at least three different wavelengths of light each of substantially a single wavelength and a fourth source of light able to output light of a spectrum of wavelengths, the ranges of light being between 365 nm and 440 nm.
    Type: Application
    Filed: April 23, 2021
    Publication date: September 29, 2022
    Inventors: CHING-LUNG CHUANG, I-HSIN CHEN, LI-JEN CHANG
  • Patent number: 10860404
    Abstract: This application provides a server and a debugging method therefor. The debugging method for a server includes receiving, by a complex programmable logic device (CPLD), a control signal generated by a switching member, and generating a switching signal; and switching, by a bus switch, a communication connection of a communications port to a debug port or a Serial Over LAN port of a baseboard management controller (BMC) based on the switching signal. In this way, debugging work is completed or industrial control application information is received at the communications port.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: December 8, 2020
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Yi-Hua Wu, I-Hsin Chen, Chung-Hsien Liu
  • Publication number: 20200064402
    Abstract: This application provides a server and a debugging method therefor. The debugging method for a server includes receiving, by a complex programmable logic device (CPLD), a control signal generated by a switching member, and generating a switching signal; and switching, by a bus switch, a communication connection of a communications port to a debug port or a Serial Over Lan port of a baseboard management controller (BMC) based on the switching signal. In this way, debugging work is completed or industrial control application information is received at the communications port.
    Type: Application
    Filed: January 29, 2019
    Publication date: February 27, 2020
    Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Yi-Hua WU, I-Hsin CHEN, Chung-Hsien LIU
  • Patent number: 8709946
    Abstract: A method for forming contact holes includes following steps. A substrate including a dense region and an isolation region is provided. A material layer is formed on the substrate. Sacrificed patterns are formed on the material layer in the dense region, wherein there is a first opening between the two adjacent sacrificed patterns. A spacer is formed on each of two sides of each of the sacrificed patterns, wherein the spacers are separated from each other. The sacrificed patterns are removed to form a second opening between two adjacent spacers. A planar layer is formed to fill up the second openings. A first slit is formed in the planar layer, wherein the first slit exposes a portion of the material layer under the second openings. The portion of the material layer exposed by the first slit is removed to form third openings in the material layer.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: April 29, 2014
    Assignee: Powerchip Technology Corporation
    Inventors: Meng-Feng Tsai, Yi-Shiang Chang, Chia-Chi Lin, I-Hsin Chen, Chia-Ming Wu
  • Publication number: 20130137270
    Abstract: A method for forming contact holes includes following steps. A substrate including a dense region and an isolation region is provided. A material layer is formed on the substrate. Sacrificed patterns are formed on the material layer in the dense region, wherein there is a first opening between the two adjacent sacrificed patterns. A spacer is formed on each of two sides of each of the sacrificed patterns, wherein the spacers are separated from each other. The sacrificed patterns are removed to form a second opening between two adjacent spacers. A planar layer is formed to fill up the second openings. A first slit is formed in the planar layer, wherein the first slit exposes a portion of the material layer under the second openings. The portion of the material layer exposed by the first slit is removed to form third openings in the material layer.
    Type: Application
    Filed: February 1, 2012
    Publication date: May 30, 2013
    Applicant: POWERCHIP TECHNOLOGY CORPORATION
    Inventors: Meng-Feng Tsai, Yi-Shiang Chang, Chia-Chi Lin, I-Hsin Chen, Chia-Ming Wu
  • Patent number: 6736650
    Abstract: An electrical connector (1) includes a dielectric housing (10), a plurality of terminals (13) received in the housing, and a retention mechanism (12) pivotally attached to the housing. The housing defines a plurality of terminal-passages (108) and first mating members (103). Each of terminals includes a bent portion (134). The retention mechanism has an elongate stopper member (120). A pair of cantilevers (122) depends from the stopper member. A second mating member (1222) is formed on each of the cantilevers, for engaging one of the first mating members. Thus the stopper member is rotatable between a first position in which the stopper is protected from thermal warp or deformation, and a second position in which the terminals are secured in the corresponding terminal-passages.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: May 18, 2004
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: I-Hsin Chen, Chien-Sen Huang, Zhi-Kai Guo