Patents by Inventor I-Yun Lee

I-Yun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096985
    Abstract: Methods and devices including an air gap adjacent a contact element extending to a source/drain feature of a device are described. Some embodiments of the method include depositing a dummy layer, which is subsequently removed to form the air gap. The dummy layer and subsequent air gap may be formed after a SAC dielectric layer such as silicon nitride is formed over an adjacent metal gate structure.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: I-Wen WU, Chen-Ming LEE, Fu-Kai YANG, Mei-Yun WANG
  • Publication number: 20240097035
    Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Chen-Ming Lee, I-Wen Wu, Po-Yu Huang, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20180309641
    Abstract: A method and a system are disclosed for simulating a network topology using a physical machine. A physical switch with multiple ports is divided into multiple slice switches according to a network topology. Each slice switch simulates a node in a network. Every virtual port of the slice switch corresponds to a physical port. In simulation operation, a port-mapping table is applied to allow the virtual port to be one-to-one mapped to one physical port; a VLAN conversion table is used to manage the VLAN IDs for the virtual ports and to configure a VLAN tag applied to a simulated packet so that the packet can operate in the slice switch; an output port table is used to determine the output port of the simulated packet; and a pop-off VLAN tag table is used to allow the packet to restore to its original VLAN ID or non-VLAN tag state.
    Type: Application
    Filed: October 9, 2017
    Publication date: October 25, 2018
    Inventors: Shie-Yuan Wang, I-Yun Lee