Patents by Inventor Ian D. O'Connor

Ian D. O'Connor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Reconfigurable logic cell made up of double-gate MOSFET transistors
    Patent number: 7859308
    Abstract: Reconfigurable logic cells based on dual gate MOSFET transistors (DG MOSFETs) including n inputs (A,B), n being greater than or equal to 2 and capable of performing at least four logic functions with which logical signals provided on the n inputs (A,B) may be processed. The cell contains, between the ground and the output (F) of the cell, at least one first branch including n dual gate N-type MOSFET transistors (M1,M2) in series and n?1 branches in parallel with the first branch, each provided with a dual gate N-type MOSFET transistor (M3), each of the logic functions corresponding to a given configuration of the cell. A specific set of control signals (C1,C2) is applied on the rear gates of at least one portion of the transistors (M2,M3), each control signal (C1,C2) being capable of setting the transistor (M2,M3) to a particular operating mode.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: December 28, 2010
    Assignees: Ecole Centrale de Lyon, Centre National de la Recherche Scientifique (CNRS)
    Inventors: Ian D. O'Connor, Ilham Hassoune
  • RECONFIGURABLE LOGIC CELL MADE UP OF DOUBLE-GATE MOSFET TRANSISTORS
    Publication number: 20100194430
    Abstract: Reconfigurable logic cells based on dual gate MOSFET transistors (DG MOSFETs) including n inputs (A,B), n being greater than or equal to 2 and capable of performing at least four logic functions with which logical signals provided on the n inputs (A,B) may be processed. The cell contains, between the ground and the output (F) of the cell, at least one first branch including n dual gate N-type MOSFET transistors (M1,M2) in series and n?1 branches in parallel with the first branch, each provided with a dual gate N-type MOSFET transistor (M3), each of the logic functions corresponding to a given configuration of the cell. A specific set of control signals (C1,C2) is applied on the rear gates of at least one portion of the transistors (M2,M3), each control signal (C1,C2) being capable of setting the transistor (M2,M3) to a particular operating mode.
    Type: Application
    Filed: July 11, 2008
    Publication date: August 5, 2010
    Applicants: ECOLE CENTRALE DE LYON, Centre National de la Recherche Scientifique CNRS
    Inventors: Ian D. O'Connor, Ilham Hassoune
  • Marker light module
    Patent number: 6685349
    Abstract: A truck fender marker light system has one or more illuminated modules set into the corner formed by the top face and the outermost face of the fender.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: February 3, 2004
    Assignee: Paccar Inc
    Inventors: Grischa Schmidt, Floris P. Spoel, Ben Speirs, Ian D. O'Connor
  • Marker light module
    Publication number: 20030002292
    Abstract: A truck fender marker light system has one or more illuminated modules set into the corner formed by the top face and the outermost face of the fender.
    Type: Application
    Filed: July 2, 2001
    Publication date: January 2, 2003
    Applicant: PACCAR Inc.
    Inventors: Grischa Schmidt, Floris P. Spoel, Ben Speirs, Ian D. O'Connor