Abstract: A system for processing substrates in plasma chambers, such that all substrates transport and loading/unloading operations are performed in atmospheric environment, but processing is performed in vacuum environment. The substrates are transported throughout the system on carriers. The system's chambers are arranged linearly, such that carriers move from one chamber directly to the next. A conveyor, placed above or below the system's chambers, returns the carriers to the system's entry area after processing is completed. The carriers are configured for supporting substrates of different sizes. The carriers are also configured for flipping the substrates such that both surfaces of the substrates may be processed.

Abstract: An arrangement for supporting substrates during processing, having a wafer carrier with a susceptor for supporting the substrate and confining the substrate to predetermined position. An inner mask is configured for placing on top of the substrate, the inner mask having an opening pattern to mask unprocessed parts of the substrate, but expose remaining parts of the substrate for processing. An outer mask is configured for placing on top of the inner mask, the outer mask having an opening that exposes the part of the inner mask having the opening pattern, but cover the periphery of the inner mask.

Abstract: A system for processing substrates in plasma chambers, such that all substrates transport and loading/unloading operations are performed in atmospheric environment, but processing is performed in vacuum environment. The substrates are transported throughout the system on carriers. The system's chambers are arranged linearly, such that carriers move from one chamber directly to the next. A conveyor, placed above or below the system's chambers, returns the carriers to the system's entry area after processing is completed. The carriers are configured for supporting substrates of different sizes. The carriers are also configured for flipping the substrates such that both surfaces of the substrates may be processed.

Abstract: An arrangement for supporting substrates during processing, having a wafer carrier with a susceptor for supporting the substrate and confining the substrate to predetermined position. An inner mask is configured for placing on top of the substrate, the inner mask having an opening pattern to mask unprocessed parts of the substrate, but expose remaining parts of the substrate for processing. An outer mask is configured for placing on top of the inner mask, the outer mask having an opening that exposes the part of the inner mask having the opening pattern, but cover the periphery of the inner mask.

Abstract: A method for forming a patterned amorphous carbon layer in a semiconductor stack, including forming an amorphous carbon layer on a substrate and forming a silicon containing photoresist layer on top of the amorphous carbon layer. Thereafter, the method includes developing a pattern transferred into the resist layer with a photolithographic process and etching through the amorphous carbon layer in at least one region defined by the pattern in the resist layer, wherein a resist layer hard mask is formed in an outer portion of the photoresist layer during etching.

Abstract: A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.

Abstract: Described is a method for manufacturing wafers and a manufacturing system in which the footprint is substantially contained in a size approximating the processing chambers. Single wafers move horizontally through the system and processing occurs simultaneously in groups of processing chambers. Various manufacturing processes employed in making semiconductor wafers are included as processing chambers in the system.

Abstract: A method for forming a patterned amorphous carbon layer in a semiconductor stack, including forming an amorphous carbon layer on a substrate and forming a silicon containing photoresist layer on top of the amorphous carbon layer. Thereafter, the method includes developing a pattern transferred into the resist layer with a photolithographic process and etching through the amorphous carbon layer in at least one region defined by the pattern in the resist layer, wherein a resist layer hard mask is formed in an outer portion of the photoresist layer during etching.

Abstract: A method for forming a patterned amorphous carbon layer in a semiconductor stack, including forming an amorphous carbon layer on a substrate and forming a silicon containing photoresist layer on top of the amorphous carbon layer. Thereafter, the method includes developing a pattern transferred into the resist layer with a photolithographic process and etching through the amorphous carbon layer in at least one region defined by the pattern in the resist layer, wherein a resist layer hard mask is formed in an outer portion of the photoresist layer during etching.

Abstract: A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.

Abstract: Methods and apparatus for cleaning semiconductor processing equipment. The apparatus include both local and remote gas dissociators coupled to a semiconductor processing chamber to be cleaned. The methods include introducing a precursor gas into the remote dissociator where the gas is dissociated and introducing a portion of the dissociated gas into the chamber. Another portion of the dissociated gas which re-associates before introduction into the chamber is also introduced into the chamber where it is again dissociated. The dissociated gas combines with contaminants in the chamber and is exhausted from the chamber along with the contaminants.

Abstract: Methods and apparatus for cleaning semiconductor processing equipment. The apparatus include both local and remote gas dissociators coupled to a semiconductor processing chamber to be cleaned. The methods include introducing a precursor gas into the remote dissociator where the gas is dissociated and introducing a portion of the dissociated gas into the chamber. Another portion of the dissociated gas which re-associates before introduction into the chamber is also introduced into the chamber where it is again dissociated. The dissociated gas combines with contaminants in the chamber and is exhausted from the chamber along with the contaminants.

Abstract: A method for forming a patterned amorphous carbon layer in a semiconductor stack, including forming an amorphous carbon layer on a substrate and forming a silicon containing photoresist layer on top of the amorphous carbon layer. Thereafter, the method includes developing a pattern transferred into the resist layer with a photolithographic process and etching through the amorphous carbon layer in at least one region defined by the pattern in the resist layer, wherein a resist layer hard mask is formed in an outer portion of the photoresist layer during etching.