Abstract: Methods and systems for container hyperlinking are disclosed. A method includes: receiving, by a computing device, a request for a source container; determining, by the computing device, a plurality of recommended target containers corresponding to the source container; displaying, by the computing device, the source container and the plurality of recommended target containers; receiving, by the computing device, a request to link the source container to at least one of the plurality of recommended target containers; and executing an application by dynamically linking the source container and the at least one of the plurality of recommended target containers. Each of the plurality of recommended target containers corresponding to the source container may be determined using information about a popularity of the recommended target container.

Abstract: Methods and systems for container hyperlinking are disclosed. A method includes: receiving, by a computing device, a request for a source container; determining, by the computing device, a plurality of recommended target containers corresponding to the source container; displaying, by the computing device, the source container and the plurality of recommended target containers; receiving, by the computing device, a request to link the source container to at least one of the plurality of recommended target containers; and executing an application by dynamically linking the source container and the at least one of the plurality of recommended target containers. Each of the plurality of recommended target containers corresponding to the source container may be determined using information about a popularity of the recommended target container.

Abstract: A method of testing critical paths in integrated circuits begins by simulating at least one operation of an integrated circuit chip design to produce chip timing data. Next, critical paths of the integrated circuit chip design are identified based on the chip timing data. The method applies functional test signals to simulations of the critical paths and monitors the number of times each of the functional test signals propagate from the beginning to the end of each of the critical paths. This allows the method to identify stress producing test signals as those that propagate along the critical paths more than other test signals. These stress producing test signals are applied to integrated circuit chip hardware manufactured according to the integrated circuit chip design to stress test the hardware.

Abstract: A machine code builder providing improved software controlled power management is described. A machine code builder reads pre-executable code and builds machine code from the pre-executable code to maximize a duration that a resource is not required. The resource(s) not required may be user defined or the builder can analyze the pre-executable code to determine which resource(s) are not required. The builder re-organizes machine code to maximize the time a particular resource is not used. Mechanisms are also provided to have resource emulation code execute during re-energizing of a resource to prevent loss of performance.

Abstract: A power saving cache and a method of operating a power saving cache. The power saving cache includes circuitry to dynamically reduce the logical size of the cache in order to save power. Preferably, a method is used to determine optimal cache size for balancing power and performance, using a variety of combinable hardware and software techniques. Also, in a preferred embodiment, steps are used for maintaining coherency during cache resizing, including the handling of modified (“dirty”) data in the cache, and steps are provided for partitioning a cache in one of several way to provide an appropriate configuration and granularity when resizing.

Abstract: A machine code builder providing improved software controlled power management is described. A machine code builder reads pre-executable code and builds machine code from the pre-executable code to maximize a duration that a resource is not required. The resource(s) not required may be user defined or the builder can analyze the pre-executable code to determine which resource(s) are not required. The builder re-organizes machine code to maximize the time a particular resource is not used. Mechanisms are also provided to have resource emulation code execute during re-energizing of a resource to prevent loss of performance.