Abstract: An RF flip chip is provided in which a local bump region adjacent a die corner includes a balun having a centrally-located bump.

Abstract: An RF flip chip is provided in which a local bump region adjacent a die corner includes a balun having a centrally-located bump.

Abstract: An RF flip chip is provided in which a local bump region adjacent a die corner includes a balun having a centrally-located bump.

Abstract: An RF flip chip is provided in which a local bump region adjacent a die corner includes a balun having a centrally-located bump.

Abstract: An apparatus for generating a temperature-dependent current. The apparatus includes an input current scaling circuit configured to generate a first current that varies with temperature in accordance with a first programmable slope, and a second current that varies with temperature in accordance with a second programmable slope; and a current temperature blending circuit configured to generate a third current based on the first current over a first temperature range and the second current over a second temperature range, wherein the first temperature range is different than the second temperature range.

Abstract: Certain aspects provide a circuit for frequency conversion. The circuit includes first mixer circuitry coupled to a load circuit and having a first mixer configured to generate a first portion of a frequency-converted differential signal to be provided to the load circuit based on first differential input signals and second differential input signals, and a second mixer configured to generate a second portion of the frequency-converted differential signal based on third differential input signals and fourth differential input signals.

Abstract: An RF-DAC transmitter is provided that includes an in-phase channel, a quadrature-phase channel, a first intermediate-phase channel, and a second intermediate-phase channel. Each channel includes a pair of interleaved RF-DACs for producing a pair of interleaved RF signals and a subtractor.

Abstract: Amplifier configuration for load-line enhancement is described herein. In some implementations, an apparatus includes an amplifier. The amplifier includes at least one plus transistor stack, at least one minus transistor stack, and at least one inductor. The at least one plus transistor stack is coupled to a plus amplifier node and a plus input node. The at least one minus transistor stack is coupled to a minus amplifier node and a minus input node. The at least one inductor is coupled between the plus amplifier node and the minus amplifier node, with the at least one inductor including an inter-inductor node. The amplifier also includes a minus power switch coupled between the minus amplifier node and one or more supply voltages and an inductor power switch coupled between the inter-inductor node and at least one supply voltage.

Abstract: Techniques for designing baseband processing circuitry for radio IC's. In an aspect, techniques for differential-to-single-ended conversion in a baseband portion of the IC are disclosed to reduce the pin count and package size for RF IC's. In another aspect, the converter includes selectable narrowband and wideband amplifiers, wherein the wideband amplifiers may be implemented using transistor devices having smaller area than corresponding transistor devices of narrowband amplifiers. Further techniques for bypassing one or more elements, and for implementing a low-pass filter of the converter using an R-C filter network, are described.

Abstract: Techniques for designing baseband processing circuitry for radio IC's. In an aspect, techniques for differential-to-single-ended conversion in a baseband portion of the IC are disclosed to reduce the pin count and package size for RF IC's. In another aspect, the converter includes selectable narrowband and wideband amplifiers, wherein the wideband amplifiers may be implemented using transistor devices having smaller area than corresponding transistor devices of narrowband amplifiers. Further techniques for bypassing one or more elements, and for implementing a low-pass filter of the converter using an R-C filter network, are described.

Abstract: A baseband filter and upconverter with configurable efficiency for use in wireless transmitters is disclosed. In an exemplary embodiment, an apparatus is provided that includes a baseband filter having configurable efficiency, and an upconverter having configurable efficiency and coupled to the baseband filter. The baseband filter and upconverter are configured to operate at a first efficiency level in a first output power range and to operate at a second efficiency level in a second output power range.

Abstract: A high efficiency transmitter is disclosed. In an exemplary embodiment, a transmitter is provided that includes a first transmission path configured to receive a baseband signal and generate a first RF output when output power is in a first output power range, and a second transmission path configured to receive the baseband signal and generate a second RF output when the output power is in a second output power range.

Abstract: A high efficiency transmitter is disclosed. In an exemplary embodiment, a transmitter is provided that includes a first transmission path configured to receive a baseband signal and generate a first RF output when output power is in a first output power range, and a second transmission path configured to receive the baseband signal and generate a second RF output when the output power is in a second output power range.

Abstract: A baseband filter and upconverter with configurable efficiency for use in wireless transmitters is disclosed. In an exemplary embodiment, an apparatus is provided that includes a baseband filter having configurable efficiency, and an upconverter having configurable efficiency and coupled to the baseband filter. The baseband filter and upconverter are configured to operate at a first efficiency level in a first output power range and to operate at a second efficiency level in a second output power range.