Patents by Inventor Ichio Shimizu
Ichio Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9473327Abstract: A radio communication device includes: a processor configured to execute a program; and a memory configured to store the program, wherein the processor performs, based on the program, operations to: detect communication quality of each of a plurality of channels; and lower a first set modulation level of a first channel with the communication quality which is equal to or lower than a level and a second set modulation level of a first adjacent channel as at least one of two adjacent channels adjacent to the first channel in a frequency axis direction.Type: GrantFiled: June 26, 2015Date of Patent: October 18, 2016Assignee: FUJITSU LIMITEDInventors: Shigemi Aizawa, Ichio Shimizu, Ken Hiratsuka, Hikaru Murano
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Publication number: 20160065248Abstract: A radio communication device includes: a processor configured to execute a program; and a memory configured to store the program, wherein the processor performs, based on the program, operations to: detect communication quality of each of a plurality of channels; and lower a first set modulation level of a first channel with the communication quality which is equal to or lower than a level and a second set modulation level of a first adjacent channel as at least one of two adjacent channels adjacent to the first channel in a frequency axis direction.Type: ApplicationFiled: June 26, 2015Publication date: March 3, 2016Inventors: Shigemi AIZAWA, Ichio SHIMIZU, Ken HIRATSUKA, Hikaru MURANO
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Patent number: 8698289Abstract: The semiconductor device is high in both heat dissipating property and connection reliability in mounting. The semiconductor device includes a semiconductor chip, a resin sealing member for sealing the semiconductor chip, a first conductive member connected to a first electrode formed on a first main surface of the semiconductor chip, and a second conductive member connected to a second electrode formed on a second main surface opposite to the first main surface of the semiconductor chip, the first conductive member being exposed from a first main surface of the resin sealing member, and the second conductive member being exposed from a second main surface opposite to the first main surface of the resin sealing member and also from side faces of the resin sealing member.Type: GrantFiled: August 24, 2011Date of Patent: April 15, 2014Assignee: Renesas Electronics CorporationInventors: Yukihiro Satou, Takeshi Otani, Hiroyuki Takahashi, Toshiyuki Hata, Ichio Shimizu
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Patent number: 8138600Abstract: A semiconductor device is provided, which is capable of improving mounting flexibility relatively and increasing general versatility, as well as realizing heat radiation characteristics and low on-resistance. Moreover, the semiconductor device is provided, which is capable of improving reliability, performing processing in manufacturing processes easily and reducing manufacturing costs. Also, the semiconductor device capable of decreasing the mounting area is provided. A semiconductor chip in which an IGBT is formed and a semiconductor chip in which a diode is formed are mounted over a die pad. Then, the semiconductor chip and the semiconductor chip are connected by using a clip. The clip is arranged so as not to overlap with bonding pads formed at the semiconductor chip in a flat state. The bonding pads formed at the semiconductor chip are connected to electrodes by using wires.Type: GrantFiled: July 11, 2007Date of Patent: March 20, 2012Assignee: Renesas Electronics CorporationInventors: Akira Muto, Ichio Shimizu, Tetsuo Iljima, Toshiyuki Hata, Katsuo Ishizaka
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Publication number: 20110309487Abstract: The semiconductor device is high in both heat dissipating property and connection reliability in mounting. The semiconductor device includes a semiconductor chip, a resin sealing member for sealing the semiconductor chip, a first conductive member connected to a first electrode formed on a first main surface of the semiconductor chip, and a second conductive member connected to a second electrode formed on a second main surface opposite to the first main surface of the semiconductor chip, the first conductive member being exposed from a first main surface of the resin sealing member, and the second conductive member being exposed from a second main surface opposite to the first main surface of the resin sealing member and also from side faces of the resin sealing member.Type: ApplicationFiled: August 24, 2011Publication date: December 22, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Yukihiro Satou, Takeshi Otani, Hiroyuki Takahashi, Toshiyuki Hata, Ichio Shimizu
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Patent number: 8022518Abstract: A novel semiconductor device high in both heat dissipating property and connection reliability in mounting is to be provided. The semiconductor device comprises a semiconductor chip, a resin sealing member for sealing the semiconductor chip, a first conductive member connected to a first electrode formed on a first main surface of the semiconductor chip, and a second conductive member connected to a second electrode formed on a second main surface opposite to the first main surface of the semiconductor chip, the first conductive member being exposed from a first main surface of the resin sealing member, and the second conductive member being exposed from a second main surface opposite to the first main surface of the resin sealing member and also from side faces of the resin sealing member.Type: GrantFiled: April 13, 2010Date of Patent: September 20, 2011Assignee: Renesas Electronics CorporationInventors: Yukihiro Satou, Takeshi Otani, Hiroyuki Takahashi, Toshiyuki Hata, Ichio Shimizu
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Publication number: 20110156274Abstract: The present invention provides a semiconductor device capable of suppressing degradation in connection reliability due to the decrease in thickness of a conductive adhesive caused by the movement of a connecting plate in a semiconductor device to which a power transistor is mounted. A step is provided in the thin part of the connecting plate connected to a lead post to lock the connecting plate by contacting the step to the tip of the lead post. Alternatively, a groove is provided in the thin part of the connecting plate to lock the connecting plate by connecting the lead post to only the part of the connecting plate on the tip side from the groove.Type: ApplicationFiled: March 8, 2011Publication date: June 30, 2011Applicant: Renesas Technology Corp.Inventors: Kenya Kawano, Kisho Ashida, Naotaka Tanaka, Hiroshi Sato, Ichio Shimizu
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Patent number: 7969000Abstract: A semiconductor device having a plurality of chips is reduced in size. In HSOP (semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a first tab, second tab, and third tab. The drains of the pMISFET and nMISFET over each tab are electrically connected with each other. Thus, two of six MISFETs can be placed over each of three tabs divided in correspondence with the number of phases of the motor, and they can be packaged in one in a compact manner. As a result, the size of the HSOP for driving a three-phase motor, having a plurality of chips can be reduced.Type: GrantFiled: February 16, 2010Date of Patent: June 28, 2011Assignee: Renesas Electronics CorporationInventors: Yukihiro Sato, Norio Kido, Tatsuhiro Seki, Katsuo Ishizaka, Ichio Shimizu
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Patent number: 7955902Abstract: A semiconductor device manufacturing method in which a semiconductor chip is connected to first and second lead frames. Source and gate electrodes extending over a first main surface of the semiconductor chip are connected to first electrode plates of the first lead frame and a drain electrode on the second main surface of the semiconductor chip, opposite to the first main surface, is connected to a drain electrode plate of the second lead frame. A sealing body is formed to cover the semiconductor chip and lead frames, while leaving the top surface of the drain electrode plate exposed with respect to the sealing body. Unnecessary portions of the first and second lead frames are cut off and surface mounting terminals are formed from the portions of the first and second electrode plates projecting from the sealing body.Type: GrantFiled: June 25, 2010Date of Patent: June 7, 2011Assignee: Renesas Electronics CorporationInventors: Toshiyuki Hata, Takeshi Otani, Ichio Shimizu
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Publication number: 20100261316Abstract: A semiconductor device has a sealing body formed of an insulating resin and a semiconductor chip positioned within the sealing body. A gate electrode and a source electrode are on a first main surface of the semiconductor chip and a back electrode (drain electrode) is on a second main surface thereof. An upper surface of a portion of a drain electrode plate that projects in a gull wing shape is exposed from the sealing body and a lower surface thereof is connected to the back electrode through an adhesive. A gate electrode plate projects in a gull wing shape on an opposite end side of the sealing body and is connected to the gate electrode within the sealing body. A source electrode plate projects in a gull wing shape on the opposite end side of the sealing body and is connected to the source electrode within the sealing body.Type: ApplicationFiled: June 25, 2010Publication date: October 14, 2010Applicant: RENESAS TECHNOLOGY CORPORATIONInventors: Toshiyuki Hata, Takeshi Otani, Ichio Shimizu
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Publication number: 20100193934Abstract: A novel semiconductor device high in both heat dissipating property and connection reliability in mounting is to be provided. The semiconductor device comprises a semiconductor chip, a resin sealing member for sealing the semiconductor chip, a first conductive member connected to a first electrode formed on a first main surface of the semiconductor chip, and a second conductive member connected to a second electrode formed on a second main surface opposite to the first main surface of the semiconductor chip, the first conductive member being exposed from a first main surface of the resin sealing member, and the second conductive member being exposed from a second main surface opposite to the first main surface of the resin sealing member and also from side faces of the resin sealing member.Type: ApplicationFiled: April 13, 2010Publication date: August 5, 2010Applicant: RENESAS TECHNOLOGY CORP.Inventors: Yukihiro Satou, Takeshi Otani, Hiroyuki Takahashi, Toshiyuki Hata, Ichio Shimizu
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Patent number: 7763967Abstract: A semiconductor device has a sealing body formed of an insulating resin and a semiconductor chip positioned within the sealing body. A gate electrode and a source electrode are on a first main surface of the semiconductor chip and a back electrode (drain electrode) is on a second main surface thereof. An upper surface of a portion of a drain electrode plate that projects in a gull wing shape is exposed from the sealing body and a lower surface thereof is connected to the back electrode through an adhesive. A gate electrode plate projects in a gull wing shape on an opposite end side of the sealing body and is connected to the gate electrode within the sealing body. A source electrode plate projects in a gull wing shape on the opposite end side of the sealing body and is connected to the source electrode within the sealing body.Type: GrantFiled: June 3, 2008Date of Patent: July 27, 2010Assignee: Renesas Technology Corp.Inventors: Toshiyuki Hata, Takeshi Otani, Ichio Shimizu
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Publication number: 20100181628Abstract: Prevention of disconnection of a bonding wire resulting from adhesive interface delamination between a resin and a leadframe, and improvement of joint strength of the resin and the leadframe are achieved in a device manufactured by a low-cost and simple processing. A boss is provided on a source lead by a stamping processing, and a support pillar is provided in a concave portion on a rear side of the source lead in order to prevent ultrasonic damping upon joining the bonding wire onto the boss, so that an insufficiency of the joint strength between the bonding wire and the source lead is prevented. Also, a continuous bump is provided on the boss so as to surround a joint portion between the source lead and the bonding wire, so that disconnection of the bonding wire resulting from delamination between the resin and the source lead is prevented.Type: ApplicationFiled: January 21, 2010Publication date: July 22, 2010Applicant: Renesas Technology Corp.Inventors: Kenya Kawano, Kisho Ashida, Kuniharu Muto, Ichio Shimizu, Tomibumi Inoue
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Publication number: 20100140718Abstract: A semiconductor device having a plurality of chips is reduced in size. In HSOP (semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a first tab, second tab, and third tab. The drains of the pMISFET and nMISFET over each tab are electrically connected with each other. Thus, two of six MISFETs can be placed over each of three tabs divided in correspondence with the number of phases of the motor, and they can be packaged in one in a compact manner. As a result, the size of the HSOP for driving a three-phase motor, having a plurality of chips can be reduced.Type: ApplicationFiled: February 16, 2010Publication date: June 10, 2010Applicant: RENESAS TECHNOLOGY CORP.Inventors: Yukihiro Sato, Norio Kido, Tatsuhiro Seki, Katsuo Ishizaka, Ichio Shimizu
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Patent number: 7732919Abstract: Coupling reliability of a passive component is improved to increase the reliability of a semiconductor device. A first through hole is formed in a first electrode part of a first plate-like lead, and a second through hole is formed in a second electrode part of a second plate-like lead. As a result, at the first electrode part of the first plate-like lead, one external terminal of the passive component can be coupled to the first electrode parts on both sides of the first through hole while being laid across the first through hole. Also, at the second electrode part of the second plate-like lead, the other external terminal of the passive component can be coupled to the second electrode parts on both sides of the second through hole while being laid across the second through hole. Accordingly, at central portions both in the longitudinal and width directions of the passive component, the passive component is surrounded by sealing members.Type: GrantFiled: January 29, 2009Date of Patent: June 8, 2010Assignee: Renesas Technology Corp.Inventors: Ichio Shimizu, Kenya Kawano, Kisho Ashida, Yuichi Machida
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Patent number: 7728416Abstract: A novel semiconductor device high in both heat dissipating property and connection reliability in mounting is to be provided. The semiconductor device comprises a semiconductor chip, a resin sealing member for sealing the semiconductor chip, a first conductive member connected to a first electrode formed on a first main surface of the semiconductor chip, and a second conductive member connected to a second electrode formed on a second main surface opposite to the first main surface of the semiconductor chip, the first conductive member being exposed from a first main surface of the resin sealing member, and the second conductive member being exposed from a second main surface opposite to the first main surface of the resin sealing member and also from side faces of the resin sealing member.Type: GrantFiled: June 5, 2008Date of Patent: June 1, 2010Assignee: Renesas Technology Corp.Inventors: Yukihiro Satou, Takeshi Otani, Hiroyuki Takahashi, Toshiyuki Hata, Ichio Shimizu
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Patent number: 7692285Abstract: A semiconductor device having a plurality of chips is reduced in size. In HSOP (semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a first tab, second tab, and third tab. The drains of the pMISFET and nMISFET over each tab are electrically connected with each other. Thus, two of six MISFETs can be placed over each of three tabs divided in correspondence with the number of phases of the motor, and they can be packaged in one in a compact manner. As a result, the size of the HSOP for driving a three-phase motor, having a plurality of chips can be reduced.Type: GrantFiled: June 29, 2006Date of Patent: April 6, 2010Assignee: Renesas Technology Corp.Inventors: Yukihiro Sato, Norio Kido, Tatsuhiro Seki, Katsuo Ishizaka, Ichio Shimizu
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Publication number: 20090190320Abstract: Coupling reliability of a passive component is improved to increase the reliability of a semiconductor device. A first through hole is formed in a first electrode part of a first plate-like lead, and a second through hole is formed in a second electrode part of a second plate-like lead. As a result, at the first electrode part of the first plate-like lead, one external terminal of the passive component can be coupled to the first electrode parts on both sides of the first through hole while being laid across the first through hole. Also, at the second electrode part of the second plate-like lead, the other external terminal of the passive component can be coupled to the second electrode parts on both sides of the second through hole while being laid across the second through hole. Accordingly, at central portions both in the longitudinal and width directions of the passive component, the passive component is surrounded by sealing members.Type: ApplicationFiled: January 29, 2009Publication date: July 30, 2009Inventors: ICHIO SHIMIZU, Kenya Kawano, Kisho Ashida, Yuichi Machida
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Publication number: 20090001559Abstract: A novel semiconductor device high in both heat dissipating property and connection reliability in mounting is to be provided. The semiconductor device comprises a semiconductor chip, a resin sealing member for sealing the semiconductor chip, a first conductive member connected to a first electrode formed on a first main surface of the semiconductor chip, and a second conductive member connected to a second electrode formed on a second main surface opposite to the first main surface of the semiconductor chip, the first conductive member being exposed from a first main surface of the resin sealing member, and the second conductive member being exposed from a second main surface opposite to the first main surface of the resin sealing member and also from side faces of the resin sealing member.Type: ApplicationFiled: June 5, 2008Publication date: January 1, 2009Inventors: Yukihiro Satou, Takeshi Otani, Hiroyuki Takahashi, Toshiyuki Hata, Ichio Shimizu
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Publication number: 20080315378Abstract: A semiconductor device has a sealing body formed of an insulating resin and a semiconductor chip positioned within the sealing body. A gate electrode and a source electrode are on a first main surface of the semiconductor chip and a back electrode (drain electrode) is on a second main surface thereof. An upper surface of a portion of a drain electrode plate that projects in a gull wing shape is exposed from the sealing body and a lower surface thereof is connected to the back electrode through an adhesive. A gate electrode plate projects in a gull wing shape on an opposite end side of the sealing body and is connected to the gate electrode within the sealing body. A source electrode plate projects in a gull wing shape on the opposite end side of the sealing body and is connected to the source electrode within the sealing body.Type: ApplicationFiled: June 3, 2008Publication date: December 25, 2008Inventors: Toshiyuki Hata, Takeshi Otani, Ichio Shimizu