Abstract: A pair of DRAM chips 1A and 1B are mounted opposedly to each other with wiring means such as lead frames put therebetween, the lead frames being substantially integral with external terminals 3B. Then, these DRAM chips and lead frames are connected together by the conventional wire bonding method. Plural pairs of the thus-connected DRAM chips and lead frames are stacked and corresponding leads of the lead frames are connected in common to form a laminate. The plural DRAM chips thus mounted are activated selectively in accordance with a predetermined chip selection signal. Additionally, partial DRAM chips capable of partially functioning normally are combined together by utilizing the above chip mounting method to constitute a single DRAM package.

Abstract: A laminate capable of mounting semiconductor elements thereon; comprising an insulating layer which is constituted by a resin portion of sea-island structure and a woven reinforcement. The resin portion of sea-island structure is, for example, such that a resin as islands are dispersed in a resin as a matrix. Thus, the insulating layer exhibits a coefficient of thermal expansion of 3.0.about.10 (ppm/K) in a planar direction thereof and a glass transition temperature of 150.about.300 (.degree.C.). Owing to these physical properties, thermal stresses which the laminate undergoes in packaging the semiconductor elements thereon can be reduced, so that the connections of the laminate with the semiconductor elements can be made highly reliable.

Abstract: A lead frame for a semiconductor IC device has a pair of common elongated leads and first and second groups of slender leads arranged on opposite sides of the common elongated leads and generally extending transverse to the common elongated leads. The common elongated leads have as their integral parts slender leads extending therefrom generally transverse thereto and substantially linear extensions from both ends of the common elongated leads. The linear extensions serve to firmly support a semiconductor chip to be packaged along with parts of the leads. The common elongated leads may further have as their integral parts projections extending from their sides for enhancement of the heat dissipation capability. A semiconductor chip may have bonding pads arranged thereon such that bonding wires and the common elongated leads do not cross each other for electrical connection between the common elongated leads and bonding pads of the semiconductor chip.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: A lead frame for a semiconductor IC device has a pair of common elongated leads and first and second groups of slender leads arranged on opposite sides of the common elongated leads and generally extending transverse to the common elongated leads. The common elongated leads have as their integral parts slender leads extending therefrom generally transverse thereto and substantially linear extensions from both ends of the common elongated leads. The linear extensions serve to firmly support a semiconductor chip to be packaged along with parts of the leads. The common elongated leads may further have as their integral parts projections extending from their sides for enhancement of the heat dissipation capability. A semiconductor chip may have bonding pads arranged thereon such that bonding wires and the common elongated leads do not cross each other for electrical connection between the common elongated leads and bonding pads of the semiconductor chip.

Abstract: A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.

Abstract: A method of producing a leadframe for use in semiconductor devices, comprises the steps of forming a space between leads 1a and 1b which are to be overlapped and welded each other, and welding the leads at a region including the space and melting and cutting off one of the leads. In one of the leads which is melted, cohesion and separation of molten metal occur in the region around the space. As a result, unnecessary portions such as an outer frame used for positioning can be cut off at the same time when the leads are connected by welding. Thus, high precision positioning of a plurality of element leadframes as well as high assembling productivity are achieved.

Abstract: An electronic component unit is provided with two electronic components which are disposed in parallel with each other and each of which has an internal electric circuit therein. Electrode pads are provided on the opposed surfaces of the two electronic components and are electrically connected to the internal electric circuits. The pads on one of the electronic components are respectively electrically and mechanically connected to the corresponding pads on the other electronic component by solder bumps. The areas of the pads increase or decrease stepwise in the direction from the central portions toward the outer peripheral edges of the two electronic components, while the volumes of the solder bumps are constant. Alternatively, the volumes of the solder bumps decrease or increase in the direction from the central portions toward the outer peripheral edges of the two electronic components, while the areas of all pads are constant.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: A packaged semiconductor device has a semiconductor chip and leads formed over the chip with an electrically insulating film interposed therebetween and a packaging material for sealing the chip and the inner lead portions of the leads. The electrically insulating film has such an area as to provide a peripheral portion not covered by parts of the inner lead portions of the leads for strengthening adherence of the electrically insulating film to the packaging material and to the chip. The electrically insulating film has a thickness substantially in a range from 80 .mu.m to 200 .mu.m for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature. A stress absorption film may be formed between the electrically insulating film and the semiconductor chip for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature.

Abstract: A lead frame for a semiconductor IC device has a pair of common elongated leads and first and second groups of slender leads arranged on opposite sides of the common elongated leads and generally extending transverse to the common elongated leads. The common elongated leads have as their integral parts slender leads extending therefrom generally transverse thereto and substantially linear extensions from both ends of the common elongated leads. The linear extensions serve to firmly support a semiconductor chip to be packaged along with parts of the leads. The common elongated leads may further have as their integral parts projections extending from their sides for enhancement of the heat dissipation capability. A semiconductor chip may have bonding pads arranged thereon such that bonding wires and the common elongated leads do not cross each other for electrical connection between the common elongated leads and bonding pads of the semiconductor chip.

Abstract: A method of producing a leadframe for use in semiconductor devices, comprises the steps of forming a space between leads 1a and 1b which are to be overlapped and welded each other, and welding the leads at a region including the space and melting and cutting off one of the leads. In one of the leads which is melted, cohesion and separation of molten metal occur in the region around the space. As a result, unnecessary portions such as an outer frame used for positioning can be cut off at the same time when the leads are connected by welding. Thus, high precision positioning of a plurality of element leadframes as well as high assembling productivity are achieved.

Abstract: A packaged semiconductor device has a semiconductor chip and leads formed over the chip with an electrically insulating film interposed therebetween and a packaging material for sealing the chip and the inner lead portions of the leads. The electrically insulating film has such an area as to provide a peripheral portion not covered by parts of the inner lead portions of the leads for strengthening adherence of the electrically insulating film to the packaging material and to the chip. The electrically insulating film has a thickness substantially in a range from 80 .mu.m to 200 .mu.m for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature. A stress absorption film may be formed between the electrically insulating film and the semiconductor chip for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature.

Abstract: A molding method in which a control plate having a size which is equal to or larger than the width of the outlet port of a supply passage are disposed in a cavity adjacent to the resin supply passage of a mold and thereby, the resin molding can be effected substantially equally at upper and lower sides of the insert comprising a semiconductor device and a lead.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: In a package for DRAM, plastic is included between the common signal inner leads (bus bar inner leads) and insulating films arranged in the central part of a semiconductor chip. Thus, the deformation of plastic at the upper edge of the common signal inner leads is reduced and no great stress is generated at this portion. Accordingly, plastic cracking can be prevented.

Abstract: A pair of DRAM chips 1A and 1B are mounted opposedly to each other with wiring means such as lead frames put therebetween, the lead frames being substantially integral with external terminals 3B. Then, these DRAM chips and lead frames are connected together by the conventional wire bonding method. Each chip is bonded with an associated lead frame and each lead frame is disposed as plural lead frame conductors contacting mutually lead frame conductors associated with similarly function bonding pads, i.e. external terminals of the chips, of the other one of the pair of chips. Ones or plural pairs of the thus-connected DRAM chips and lead frames are stacked and corresponding leads of the lead frames are connected in common to form a laminate. The plural DRAM chips thus mounted are activated selectively in accordance with a predetermined chip selection signal.

Abstract: A plastic sealed type semiconductor apparatus includes at least two semiconductor devices which are disposed with a space therebetween in such a manner that circuit forming surfaces oppose each other, and an electric signal lead which is adhered to each of the circuit forming surfaces with an insulating member provided therebetween for electric insulation and which is electrically connected to the semiconductor device by a thin metal wire. The semiconductor devices and the electric signal leads are sealed with a resin in a state where the electric signal leads are laid on top of one another to form a plastic package. The overlaid portion of the electric signal leads has a surface contact portion of the leads and a resin providing portion. The resin providing portion is a recessed portion which is formed when the resin is molded in such a manner that it passes through the surface contact portion of the leads in the lateral direction thereof.

Abstract: A semiconductor device comprises a plurality of semiconductor chips; electrodes formed on circuit surfaces of said plurality of semiconductor chips; inner leads made of a metal foil and bonded at first ends thereof to the electrodes, outer leads each having a predetermined surface at a first end thereof bonded to a second end of at least one of the inner leads, and a sealing material sealing said plurality of semiconductor chips, the electrodes, the inner leads, and part of each of the outer leads. The semiconductor chips are laminated in such a manner that those surfaces of the semiconductor chips on which their respective circuits are formed are disposed in facing relation to each other. This provides a semiconductor device which is excellent in assembling efficiency.

Abstract: A plastic encapsulated semiconductor device containing one or more of insulating films. Uneven surfaces, such as recesses and roughened surfaces, are strategically provided on peripheral side (edge) surfaces of the insulating films. As a result, therefore, an interface separation does not easily occur between the side surfaces of the insulating films and the encapsulating resin. If such an interface separation should occur, it cannot develop easily. Thus, it is possible to obtain a plastic encapsulated semiconductor device of a high level of reliability even when the largest possible semiconductor element is mounted therein within limited outside dimensions.