Abstract: A method that includes sending to an embedded flash storage device (EFSD) and during a transaction, a data unit and recovery metadata that differs from a flash memory unit memory management data structure (FMUMMDS); instructing the EFSD to program the data unit and the recovery metadata to a group of flash memory cells; sending to the host computer a transaction completion indication in response to a successful completion of the programming and before a completion of a management process that comprises updating by the flash memory controller, the FMUMMDS to reflect (a) the recovery metadata and (b) physical address information related to the group of the flash memory cells; and programming, by the EFSD, the FMUMMDS to the flash memory unit; wherein the data structure is reconstructible based upon the recovery metadata and the physical address information related to the group of the flash memory cells.

Abstract: A method for managing an encoding process, the method includes receiving or determining, by a processor, (i) code rates for multiple pages, and (ii) sizes of a plurality of data segments to be stored in the multiple pages after being encoded to provide multiple codewords; determining, by the processor, sizes of the multiple codewords while maintaining the code rates for the multiple pages and minimizing a number of split data segments out of the plurality of data segments, wherein each split data segment is split between at least two codewords of the multiple codewords, wherein a retrieval of the split data segment involves a retrieval of the at least two codewords; and sending to an encoder information about the sizes of the multiple codewords.

Abstract: A method of managing a non-volatile memory module, the method may include: allocating, by a memory controller, logically erased physical blocks of a non-volatile memory module to a spare block pool; allocating, by the memory controller, physical blocks from the spare block pool to become buffer blocks of a buffer of the non-volatile memory module; and controlling, by the memory controller, a utilization of the buffer blocks of the buffer by applying a page based buffer management scheme.

Abstract: A method for using a single spare block pool in flash memory comprising: allocating a plurality of flash memory arrays, wherein each flash memory array comprises a plurality of flash memory blocks; within a main flash memory array: allocating a used block pool comprising a plurality of used blocks and allocating a main spare block pool comprising a plurality of spare blocks; within each of the other flash memory arrays: allocating a used block pool comprising multiple used blocks; allocating a minimum spare block pool comprising a minimum number of spare blocks; allocating the main spare block pool and each of the minimum spare block pools to a single spare block pool; transferring a spare block from the main spare block pool to one of the minimum spare block pools; and transferring a spare block from a first minimum spare block pool to a second minimum spare block pool.

Abstract: A non-transitory computer readable medium, a flash controller and a method for state responsive encoding and programming; the method may include encoding an information entity by applying a state responsive encoding process to provide at least one codeword; wherein the state responsive encoding process is responsive to a state of flash memory cells; and programming the at least one codeword to at least one group of flash memory cells by applying a state responsive programming process that is responsive to the state, the state being either an estimated state or an actual state.

Abstract: A method for accessing a flash memory, the method includes: receiving a read request that is associated with a logical address that is mapped to a physical address of a set of flash memory cells; accessing multiple mapping data structures of different granularity to obtain the physical address of the set of flash memory cells; wherein during at least one point in time at least one mapping data structure is stored in an erase block and wherein the erase block comprises multiple physical pages that are written in a sequential manner and are associated with logical page addresses that are assigned in a random manner; and reading a content of the set of flash memory cells.

Abstract: A non-transitory computer readable medium, a flash controller and a method for state responsive encoding and programming; the method may include encoding an information entity by applying a state responsive encoding process to provide at least one codeword; wherein the state responsive encoding process is responsive to a state of flash memory cells; and programming the at least one codeword to at least one group of flash memory cells by applying a state responsive programming process that is responsive to the state, the state being either an estimated state or an actual state.

Abstract: A method for using a single spare block pool in flash memory comprising: allocating a plurality of flash memory arrays, wherein each flash memory array comprises a plurality of flash memory blocks; within a main flash memory array: allocating a used block pool comprising a plurality of used blocks and allocating a main spare block pool comprising a plurality of spare blocks; within each of the other flash memory arrays: allocating a used block pool comprising multiple used blocks; allocating a minimum spare block pool comprising a minimum number of spare blocks; allocating the main spare block pool and each of the minimum spare block pools to a single spare block pool; transferring a spare block from the main spare block pool to one of the minimum spare block pools; and transferring a spare block from a first minimum spare block pool to a second minimum spare block pool.

Abstract: System and method for storing data in a non-volatile memory including a multi-level cell and single-level cell memory portions. To write a dataset to the non-volatile memory, if the size of the dataset is equal to the size of pages in the multi-level cell memory portion, the dataset may be written directly to the multi-level cell memory portion to fill an integer number of pages in a single write operation. However, if the size of the dataset is different than the size of the multi-level cell memory pages, at least a portion of the dataset may be temporarily written to the single-level cell memory portion until data is accumulated in a plurality of write operations having a size equal the size of the multi-level cell memory pages. The accumulated data may fill an integer number of the pages in the multi-level cell memory portion in a single write operation.

Abstract: A method for accessing a flash memory, the method includes: receiving a read request that is associated with a logical address that is mapped to a physical address of a set of flash memory cells; accessing multiple mapping data structures of different granularity to obtain the physical address of the set of flash memory cells; wherein during at least one point in time at least one mapping data structure is stored in an erase block and wherein the erase block comprises multiple physical pages that are written in a sequential manner and are associated with logical page addresses that are assigned in a random manner; and reading a content of the set of flash memory cells.