Patents by Inventor Igarashi Yutaka

Igarashi Yutaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8842719
    Abstract: To reduce the time of reception operation switching between multiple wireless systems, a semiconductor integrated circuit includes a first reception unit including a first analog reception unit and a first digital reception unit, and a digital interface. The first analog reception unit includes a first reception mixer and a first A/D converter, and the first digital reception unit includes a first digital filter. The first reception unit, an oscillator, and a PLL enable switching from a reception operation for a first RF reception signal of a first system to a reception operation for a second RF reception signal of a second system. In a period of an end transition operation of the first digital reception unit in the switching, the PLL starts a lock operation so as to match a frequency of an oscillation output signal generated from the oscillator to a desired frequency of the second system.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: September 23, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Igarashi Yutaka, Katsube Yusaku