Abstract: In device numerical analysis by a computer, in the case of analysis involving an external circuit, much better initial values are given so that calculation time is shortened. A device simulation apparatus 10 includes: a presumed potential designation unit 12 for a user to designate presumed potentials in device electrode nodes; a physical quantity initial value setting unit 14 to acquire a physical quantity by analyzing the above described presumed potentials to set the above described physical quantity as an initial value of a physical quantity at internal nodes in the device; a potential initial value setting unit 16 to set an initial value of potential at nodes of the external circuit based on the above described presumed potential; and a device analyzing unit 18 to analyze a device involving an external circuit with the above described set initial values. Usage of device electrode node potentials presumed by the user makes better initial values available.

Abstract: Disclosed is a computer-implemented method for simulating a semiconductor device, comprising steps of: inputting physical constants of the semiconductor device; performing iterative calculation in which potential distribution, electron current density, and hole current density are solved using a drift-diffusion model represented by charge conservation equations, electron current continuation equations, and hole current continuation equations; wherein each iteration of the calculation comprises steps of: calculating an expansion amount of a band gap using an interim solution to take into consideration a quantum effect in an inversion layer; correcting potentials of electrons and holes with the expansion amount of the band gap to take into consideration the quantum effect in the inversion layer; wherein the expansion amount is obtained by steps of: providing a provisional term representing the expansion amount, based on a calculation equation in accordance with a van Dort model; regarding the provisional term a

Abstract: The present invention provides a method of numeral simulation to a semiconductor device for solving an energy transport model by a coupled method, wherein initial values of carrier temperatures are calculated from an equation of carrier temperatures and an electric field which has been obtained by solving a drift-diffusion model.

Abstract: A device simulation method of conducting processing for recognizing a line of electric force for use in numerical analyses of a semiconductor device including a line of electric force calculating step of calculating a search direction vector, with a predetermined point as a starting point, linking the starting point of the search direction vector with a point set on a straight line extending in the direction of the search direction vector, and repeating, as necessary, the processing for calculating a search direction vector, with the newly set point as a starting point, and the processing for linking the starting point of the calculated search direction vector with a newly set point, and a line of electric force subdividing step of repeating the processing for setting another new point on a line segment linking a starting point of a search direction vector with a newly set point to shorten the line segment and when predetermined conditions are satisfied, replacing the point set at the line of electric force c

Abstract: In a method for simulating parameters including a potential in a semiconductor device, deviations of the parameters are calculated for a plurality of nodes of a mesh in the semiconductor device by Newton's method. However, when absolute values of electric fields are larger than a first value and deviations of the electric fields are larger than a second value, the parameters are renewed by adding values smaller than the deviations of the parameters thereto. Otherwise, the parameters are renewed by adding the deviations of the parameters thereto.

Abstract: In order to estimate an initial potential value for semiconductor device simulation at each of iterative procedures a computer system, a plurality of bias conditions are stored in a memory. Following this, one bias condition is retrieved from the memory at a given iterative procedure. Further, an analysis result already obtained in an iterative procedure, which precedes the given iterative procedure, is retrieved from the memory. Subsequently, an initial potential value is estimated which is used in the give iterative procedure by solving a Laplace equation which is weighted by a coefficient including a reciprocal of electric field intensity.

Abstract: A mesh generator includes a mesh generation processing unit for setting a two-dimensional triangular mesh satisfying the conditions of the Delaunay partitioning on a semiconductor device to be analyzed, a triangular element deletion unit for deleting a predetermined mesh node and a mesh edge linking with the mesh node from the set mesh, a vertex selection unit for setting a new triangular mesh satisfying the conditions of the Delaunay partitioning in a polygon formed in a region from which the mesh node and the mesh edge are deleted without adding a new mesh node, and a triangular element generation unit.