Patents by Inventor Ikuo Motonaga

Ikuo Motonaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230298151
    Abstract: According to one embodiment, an inspection system includes an infrared imaging device and a controller. The infrared imaging device is for acquiring an image of a thermocompression-bonded tape package with infrared light. The tape package comprises a first tape covering a second tape. The second tape can have a pocket for an electronic component. The controller is configured to receive the image of the thermocompression-bonded tape package and detect a state of thermocompression bonding in a predetermined region of the tape package based on the received image. For example, the inspection system may detect when the bonding of the first tape to the second tape is unsatisfactory or abnormal.
    Type: Application
    Filed: September 2, 2022
    Publication date: September 21, 2023
    Inventor: Ikuo MOTONAGA
  • Patent number: 11079336
    Abstract: A semiconductor inspection apparatus of embodiments includes: a light source irradiating a semiconductor package, the semiconductor package including: a sealing portion having an upper surface, a lower surface, a first side surface, and a second side surface; and a first lead extending from the first side surface, the first lead having a first wide width portion and a first narrow width portion, the first wide width portion being between the first side surface and the first narrow width portion; an imaging device capturing a first image of the first lead; a first calculator calculating a first area of a first notch region located on one side of the first narrow width portion and a second area of a second notch region located on the other side of the first narrow width portion; and a second calculator calculating a ratio of the first area and the second area.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: August 3, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Ikuo Motonaga
  • Publication number: 20210080404
    Abstract: A semiconductor inspection apparatus of embodiments includes: a light source irradiating a semiconductor package, the semiconductor package including: a sealing portion having an upper surface, a lower surface, a first side surface, and a second side surface; and a first lead extending from the first side surface, the first lead having a first wide width portion and a first narrow width portion, the first wide width portion being between the first side surface and the first narrow width portion; an imaging device capturing a first image of the first lead; a first calculator calculating a first area of a first notch region located on one side of the first narrow width portion and a second area of a second notch region located on the other side of the first narrow width portion; and a second calculator calculating a ratio of the first area and the second area.
    Type: Application
    Filed: March 4, 2020
    Publication date: March 18, 2021
    Inventor: Ikuo Motonaga
  • Patent number: 10871456
    Abstract: A semiconductor inspection system according to an embodiment includes first imaging unit capturing an image of a first lead of a semiconductor package from a first direction perpendicular to an upper surface, the semiconductor package including a sealing portion and the first lead, the sealing portion having the upper surface, the first lead extending sideward from the sealing portion; first calculation unit calculating a front length of the first lead from the image captured by the first imaging unit; second imaging unit capturing an image of the first lead from a second direction inclined to the upper surface; second calculation unit calculating an oblique length of the first lead from the image captured by the second imaging unit; and third calculation unit calculating an amount of floating of the first lead from a reference plane parallel to the upper surface, using the front length and the oblique length.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: December 22, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Ikuo Motonaga
  • Publication number: 20200256808
    Abstract: A semiconductor inspection system according to an embodiment includes first imaging unit capturing an image of a first lead of a semiconductor package from a first direction perpendicular to an upper surface, the semiconductor package including a sealing portion and the first lead, the sealing portion having the upper surface, the first lead extending sideward from the sealing portion; first calculation unit calculating a front length of the first lead from the image captured by the first imaging unit; second imaging unit capturing an image of the first lead from a second direction inclined to the upper surface; second calculation unit calculating an oblique length of the first lead from the image captured by the second imaging unit; and third calculation unit calculating an amount of floating of the first lead from a reference plane parallel to the upper surface, using the front length and the oblique length.
    Type: Application
    Filed: September 6, 2019
    Publication date: August 13, 2020
    Inventor: Ikuo Motonaga
  • Patent number: 10483173
    Abstract: A semiconductor device inspection method according to an embodiment includes irradiating a semiconductor chip or a metal member with first inspection light having a plurality of linear beams parallel to each other from a first direction inclining with respect to a top surface of a substrate, the semiconductor chip being disposed on the substrate, and the metal member being disposed on the semiconductor chip; obtaining a first image of the semiconductor chip irradiated with the first inspection light or the metal member irradiated with the first inspection light; and calculating first three-dimensional information of the semiconductor chip or the metal member based on the first image by using an optical cutting method.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: November 19, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Ikuo Motonaga
  • Publication number: 20190295901
    Abstract: A semiconductor device inspection method according to an embodiment includes irradiating a semiconductor chip or a metal member with first inspection light having a plurality of linear beams parallel to each other from a first direction inclining with respect to a top surface of a substrate, the semiconductor chip being disposed on the substrate, and the metal member being disposed on the semiconductor chip; obtaining a first image of the semiconductor chip irradiated with the first inspection light or the metal member irradiated with the first inspection light; and calculating first three-dimensional information of the semiconductor chip or the metal member based on the first image by using an optical cutting method.
    Type: Application
    Filed: July 10, 2018
    Publication date: September 26, 2019
    Inventor: Ikuo Motonaga