Patents by Inventor Il Seok Han
Il Seok Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9735838Abstract: Provided are an apparatus and method for simplifying wireless connection and data sharing. In order to simply implement a complicated and difficult function related to vehicle wireless connection via NFC, the apparatus recognizes proximity or contact to a mobile device, transmits head unit wireless connection information to the mobile device, receives connection information from the mobile device, performs connection to the mobile device in an OBB scheme on the basis of the received connection information, and provides an NFC-linked service when the connection to the mobile device is completed.Type: GrantFiled: October 25, 2013Date of Patent: August 15, 2017Assignee: Hyundai Mobis Co., Ltd.Inventor: Il Seok Han
-
Patent number: 9586479Abstract: Disclosed is an interlocking system between content player devices. The interlocking system includes: a first mobile device; a second mobile device, in which an interlocking program is installed, interlocked with the first mobile device, and configured to receive and execute one or more contents executed by the first mobile device, and a vehicle head unit, in which an interlocking program is installed, interlocked with the second mobile device, and configured to receive and execute the contents executed by the second mobile device.Type: GrantFiled: September 30, 2015Date of Patent: March 7, 2017Assignee: HYUNDAI MOBIS CO., LTDInventor: Il Seok Han
-
Publication number: 20160157286Abstract: Disclosed is an interlocking system between content player devices. The interlocking system includes: a first mobile device; a second mobile device, in which an interlocking program is installed, interlocked with the first mobile device, and configured to receive and execute one or more contents executed by the first mobile device, and a vehicle head unit, in which an interlocking program is installed, interlocked with the second mobile device, and configured to receive and execute the contents executed by the second mobile device.Type: ApplicationFiled: September 30, 2015Publication date: June 2, 2016Inventor: Il Seok HAN
-
Patent number: 9281202Abstract: A nonvolatile memory cell and a method for fabricating the same can secure stable operational reliability as well as reducing a cell size. The nonvolatile memory cell includes a drain region formed in a substrate, a source region formed in the substrate to be separated from the drain region, a floating gate formed over the substrate between the drain region and the source region, a halo region formed in the substrate in a direction that the drain region is formed, a dielectric layer formed on sidewalls of the floating gate, and a control gate formed over the dielectric layer to overlap with at least one sidewall of the floating gate.Type: GrantFiled: October 23, 2009Date of Patent: March 8, 2016Assignee: MagnaChip Semiconductor, Ltd.Inventors: Tae-Ho Choi, Jung-Hwan Lee, Heung-Gee Hong, Jeong-Ho Cho, Min-Wan Choo, Il-Seok Han
-
Publication number: 20150035646Abstract: Provided are an apparatus and method for simplifying wireless connection and data sharing. In order to simply implement a complicated and difficult function related to vehicle wireless connection via NFC, the apparatus recognizes proximity or contact to a mobile device, transmits head unit wireless connection information to the mobile device, receives connection information from the mobile device, performs connection to the mobile device in an OBB scheme on the basis of the received connection information, and provides an NFC-linked service when the connection to the mobile device is completed.Type: ApplicationFiled: October 25, 2013Publication date: February 5, 2015Applicant: HYUNDAI MOBIS CO.,LTD.Inventor: Il Seok Han
-
Publication number: 20100270605Abstract: A nonvolatile memory cell and a method for fabricating the same can secure stable operational reliability as well as reducing a cell size. The nonvolatile memory cell includes a drain region formed in a substrate, a source region formed in the substrate to be separated from the drain region, a floating gate formed over the substrate between the drain region and the source region, a halo region formed in the substrate in a direction that the drain region is formed, a dielectric layer formed on sidewalls of the floating gate, and a control gate formed over the dielectric layer to overlap with at least one sidewall of the floating gate.Type: ApplicationFiled: October 23, 2009Publication date: October 28, 2010Inventors: Tae-Ho CHOI, Jung-Hwan Lee, Heung-Gee Hong, Jeong-Ho Cho, Min-Wan Choo, Il-Seok Han
-
Patent number: 7772638Abstract: Provided is a non-volatile memory device that can repetitively perform data write and erase operations in an embedded semiconductor device. In the non-volatile memory device, a device isolation region isolates a first active region and a second active region formed on a semiconductor substrate. A transistor electrode is formed on a first insulating layer in the first active region. A first capacitor electrode is formed on a second insulating layer in the first active region. A second capacitor electrode is formed on a third insulating layer in the second active region and electrically connected to the transistor electrode and the first capacitor electrode.Type: GrantFiled: December 29, 2006Date of Patent: August 10, 2010Assignee: MagnaChip Semiconductor Ltd.Inventor: Il Seok Han
-
Patent number: 7208374Abstract: An EEPROM device manufacturing method is disclosed. The method includes the steps of oxidation, polysilicon deposition, and etching to form first polysilicon layers of a select transistor and a floating gate electrode. The method also includes a second polysilicon deposition step followed by an etching step to form a logic gate electrode and a control gate electrode at the same time. This method prevents damage to the silicon substrate and reduces the number of process steps compared to conventional manufacturing methods.Type: GrantFiled: November 8, 2004Date of Patent: April 24, 2007Assignee: Magnachip Semiconductor Ltd.Inventor: Il-Seok Han
-
Patent number: 7105381Abstract: The present invention relates to a wafer alignment method.Type: GrantFiled: June 28, 2005Date of Patent: September 12, 2006Assignee: MagnaChip Semiconductor, Ltd.Inventor: Il Seok Han
-
Publication number: 20050142755Abstract: The present invention relates to a method for manufacturing a nonvolatile memory device, which can prevent damage to a silicon substrate and reduce a number of process steps by forming a logic gate electrode and cell control gate electrode at the same time instead of an SAE etching process.Type: ApplicationFiled: November 8, 2004Publication date: June 30, 2005Applicant: Magnachip Semiconductor, Ltd.Inventor: Il-Seok Han
-
Patent number: 6774477Abstract: A structure and method of stacking multiple semiconductor substrates of a composite semiconductor device are disclosed. The structure and method of stacking multiple semiconductor substrates of a composite semiconductor device can align the semiconductor substrates when stacking and bonding the semiconductor substrates after fabricating two or more semiconductor devices of the composite semiconductor device onto the semiconductor substrates.Type: GrantFiled: December 27, 2002Date of Patent: August 10, 2004Assignee: Hynix Semiconductor Inc.Inventor: Il-seok Han
-
Publication number: 20040140052Abstract: The present invention discloses a method for aligning a key in a semiconductor device, which prevents misalignment in subsequent photo processes during a semiconductor key formation process. The method comprises the steps of: preparing a semiconductor substrate that is divided into a scribe lane region and a main chip region; depositing an oxide film on the semiconductor substrate for forming an align key; forming an area key and a first align key at the same time on the scribe lane region by selectively etching the oxide film by using a N-well ion implantation mask; performing a N-well ion implantation on the region which the oxide film is removed from; and forming a second align key in the area key, whose formation is already finished by removing the oxide film, by a silicon etching method using a P-well mask, upon a N-well process using a P-well ion implantation mask.Type: ApplicationFiled: December 29, 2003Publication date: July 22, 2004Inventor: Il-seok Han
-
Publication number: 20040032017Abstract: A structure and method of stacking multiple semiconductor substrates of a composite semiconductor device are disclosed. The structure and method of stacking multiple semiconductor substrates of a composite semiconductor device can align the semiconductor substrates when stacking and bonding the semiconductor substrates after fabricating two or more semiconductor devices of the composite semiconductor device onto the semiconductor substrates.Type: ApplicationFiled: December 27, 2002Publication date: February 19, 2004Inventor: Il-seok Han
-
Patent number: 6544866Abstract: A semiconductor device fabricated on a multiple substrate with a first structure including a first semiconductor substrate with at least one first bonding pad and at least one alignment key formed thereon, and a second structure including a second semiconductor substrate with at least one second bonding pad and at least one alignment aperture passing through the second semiconductor substrate. By irradiating a UV beam through the alignment aperture and detecting reflection off the alignment key, the first and second semiconductor substrates are aligned.Type: GrantFiled: May 31, 2002Date of Patent: April 8, 2003Assignee: Hynix Semiconductor Inc.Inventor: Il-Seok Han
-
Publication number: 20020145202Abstract: A semiconductor device fabricated on a multiple substrate with a first structure including a first semiconductor substrate with at least one first bonding pad and at least one alignment key formed thereon, and a second structure including a second semiconductor substrate with at least one second bonding pad and at least one alignment aperture passing through the second semiconductor substrate. By irradiating a UV beam through the alignment aperture and detecting reflection off the alignment key, the first and second semiconductor substrates are aligned.Type: ApplicationFiled: May 31, 2002Publication date: October 10, 2002Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Il-Seok Han
-
Patent number: 6441497Abstract: A semiconductor device fabricated on a multiple substrate with a first structure including a first semiconductor substrate with at least one first bonding pad and at least one alignment key formed thereon, and a second structure including a second semiconductor substrate with at least one second bonding pad and at least one alignment aperture passing through the second semiconductor substrate. By irradiating a UV beam through the alignment aperture and detecting reflection off the alignment key, the first and second semiconductor substrates are aligned.Type: GrantFiled: October 16, 2001Date of Patent: August 27, 2002Assignee: Hynix Semiconductor Inc.Inventor: Il-Seok Han