Abstract: A multi touch sensing module comprising a plurality of electrically conductive touch surfaces, each connected to at least one trace, wherein the touch surfaces are arranged in more than two columns, each including more than two touch surfaces, wherein touch surfaces in corresponding positions in said columns form staggered rows, and all touch surfaces reside in a single layer of electrically conductive material.

Abstract: Surface-capacitance-based multi-touch touch panel apparatus including a multiplicity of electrically conductive shapes e.g. diamonds arranged along at least one of rows and columns whose capacitance is measured by capacitive sensors; wherein the rows and columns include a set of linear arrays including at least one individual linear array which includes a plurality of first sets of shapes, each first set including n>=1 shapes all shorted to a single set-specific capacitive sensor such that no two first sets are both shorted to a common capacitive sensor.

Abstract: An embedded controller includes a microcontroller core, a first bus interface that does not support bus arbitration, a second bus interface and memory control circuitry. The first bus interface is configured to receive and transmit memory transactions from and to a Central Processing Unit (CPU) chipset. The second bus interface is configured to communicate with a memory and to transfer the memory transactions of the CPU chipset to and from the memory. The memory control circuitry is configured to evaluate a starvation condition that identifies an inability of the microcontroller core to access the memory via the second bus interface due to the memory transactions transferred between the CPU chipset and the memory via the first and second bus interfaces, and to invoke a predefined corrective action when the starvation condition is met.

Abstract: A multi touch sensing module comprising a plurality of electrically conductive touch surfaces, each connected to at least one trace, wherein the touch surfaces are arranged in more than two columns, each including more than two touch surfaces, wherein touch surfaces in corresponding positions in said columns form staggered rows, and all touch surfaces reside in a single layer of electrically conductive material.

Abstract: An embedded controller includes a microcontroller core, a first bus interface that does not support bus arbitration, a second bus interface and memory control circuitry. The first bus interface is configured to receive and transmit memory transactions from and to a Central Processing Unit (CPU) chipset. The second bus interface is configured to communicate with a memory and to transfer the memory transactions of the CPU chipset to and from the memory. The memory control circuitry is configured to evaluate a starvation condition that identifies an inability of the microcontroller core to access the memory via the second bus interface due to the memory transactions transferred between the CPU chipset and the memory via the first and second bus interfaces, and to invoke a predefined corrective action when the starvation condition is met.

Abstract: Surface-capacitance-based multi-touch touch panel apparatus including a multiplicity of electrically conductive shapes e.g. diamonds arranged along at least one of rows and columns whose capacitance is measured by capacitive sensors; wherein the rows and columns include a set of linear arrays including at least one individual linear array which includes a plurality of first sets of shapes, each first set including n>=1 shapes all shorted to a single set-specific capacitive sensor such that no two first sets are both shorted to a common capacitive sensor.

Abstract: A computing apparatus includes a network interface, a Central Processing Unit (CPU), an auxiliary controller and an activation controller. The CPU has active and switched-off operational states and is arranged, when operating in the active operational state, to accept data from a communication network using the network interface. The auxiliary display module is connected to the CPU and is arranged, when the CPU is in the switched-off operational state, to display auxiliary information to a user based on the data accepted by the CPU. The activation controller is coupled to intermittently switch the CPU to the active operational state and to cause the CPU to update the data from the communication network, so as to update the auxiliary information displayed by the auxiliary display module.

Abstract: A computing apparatus includes a primary keyboard and a primary display, which are respectively arranged to accept input from a user and to display information to the user. An auxiliary display is arranged to display auxiliary information to the user when the apparatus is in a switched-off operational state, and to hide the auxiliary information when deactivated. An activation controller is arranged to monitor the primary keyboard when the auxiliary display is deactivated, to detect an activation code comprising one or more keystrokes entered using the primary keyboard, and to activate the auxiliary display responsively to detecting the activation code.

Abstract: A computing apparatus includes a display, a Central Processing Unit (CPU) having active and switched-off operational states and an auxiliary display controller, which is active when the CPU is in the switched-off operational state. The computing apparatus further includes a switch, which is operative to connect the CPU to the display when the CPU is in the active operational state, so as to display first information produced by the CPU, and to connect the auxiliary display controller to the display when the CPU is in the switched-off operational state, so as to display second information produced by the auxiliary display controller.

Abstract: A method for selecting one of a plurality of BIOS images included in a computer system includes indicating a selection of a BIOS image via a bus by an embedded controller. The method also includes powering up or resetting the system. In addition, the method includes accessing the selected BIOS image for execution.

Abstract: A method for implementing an MD5 algorithm on an 8-bit micro-controller includes providing a pointer to an entry in a table stored in a read only memory (ROM). The entry corresponds to an operation in the MD5 algorithm. The method also includes retrieving from the entry at least one pointer to at least one variable required for the operation. In addition, the method includes performing the operation.

Abstract: In a computer system that includes processing, memory and I/O modules and ACPI for outputting an ONCTL signal to a power supply unit. The power supply is configured to output a power off signal indicative of power off state and power on signal indicative of power on state. There is provided an embedded controller coupled to the ACPI and to the power supply unit. The embedded controller includes input for receiving a shut off event and in response to the shut off event, feeding to the ACPI a controller power off signal as long as the power supply is in power on state.